Bump buildroot to version 2017-02

TG-3 #closed
2017-03-28 18:29:16 +02:00
parent 93b7fd91d2
commit 42c92a6bcb
3010 changed files with 41289 additions and 46428 deletions
--- a/bsp/buildroot/board/acmesystems/aria-g25/genimage.cfg
+++ b/bsp/buildroot/board/acmesystems/aria-g25/genimage.cfg
@@ -0,0 +1,35 @@
+# Minimal SD card image for the Acmesystems Aria G25
+
+image boot.vfat {
+	vfat {
+		file zImage {
+			image = "zImage"
+		}
+
+		file at91-ariag25.dtb {
+			image = "at91-ariag25.dtb"
+		}
+
+		file boot.bin {
+			image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.8.6.bin"
+		}
+	}
+	size = 16M
+}
+
+image sdcard.img {
+	hdimage {
+	}
+
+	partition boot {
+		partition-type = 0xC
+		bootable = "true"
+		image = "boot.vfat"
+	}
+
+	partition rootfs {
+		partition-type = 0x83
+		image = "rootfs.ext4"
+		size = 512M
+	}
+}
--- a/bsp/buildroot/board/acmesystems/aria-g25/post-image.sh
+++ b/bsp/buildroot/board/acmesystems/aria-g25/post-image.sh
@@ -0,0 +1,14 @@
+#!/bin/sh
+
+BOARD_DIR="$(dirname $0)"
+GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
+GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
+
+rm -rf "${GENIMAGE_TMP}"
+
+genimage  \
+	--rootpath "${TARGET_DIR}"     \
+	--tmppath "${GENIMAGE_TMP}"    \
+	--inputpath "${BINARIES_DIR}"  \
+	--outputpath "${BINARIES_DIR}" \
+	--config "${GENIMAGE_CFG}"
--- a/bsp/buildroot/board/acmesystems/aria-g25/readme.txt
+++ b/bsp/buildroot/board/acmesystems/aria-g25/readme.txt
@@ -1,51 +1,44 @@
+Acme Systems Aria G25
+
 Build instructions
 ==================

-As a regular user configure and then build:
+To build an image for the Aria G25 choose the configuration
+corresponding to the Aria variant.

-$ make acmesystems_aria_g25_128mb_defconfig (128MB RAM variant)
-  or...
-$ make acmesystems_aria_g25_256mb_defconfig (256MB RAM variant)
+For 128MB RAM variant type:
+
+$ make acmesystems_aria_g25_128mb_defconfig
+
+else for 256MB RAM variant type:
+
+$ make acmesystems_aria_g25_256mb_defconfig
+
+To customize the configuration choosed type:
+
+$ make menuconfig
+
+When you are ready to start building Buildroot type:

 $ make

-Writing to the MicroSD card
-===========================
+How to write the microSD card
+=============================

-Assuming your Aria G25 baseboard has a MicroSD socket, for example with
-the Terra baseboard, you'll need a blank MicroSD (obviously) initialized
-in a particular way to be able to boot from it.
+Once the build process is finished you will have an image called
+"sdcard.img" in the output/images/ directory.

-Assuming the card is seen as /dev/sdb in your PC/laptop/other device
-you'll need to run the following commands as root or via sudo.
+Write the bootable SD card image "sdcard.img" onto an SD card with
+"dd" command:

-Make sure all of the card partitions are unmounted before starting.
+  $ sudo dd if=output/images/sdcard.img of=/dev/sdX

-First we'll need to create two partitions:
+Assuming your Aria G25 baseboard has a MicroSD socket, for example
+with the Terra baseboard, insert the microSD card into the baseboard
+slot and power it.

-# sfdisk -uM /dev/sdb <<EOF
-,32,6
-;
-EOF
-
-Then we'll need to create the empty filesystems:
-
-# mkdosfs -n SD_BOOT /dev/sdb1
-# mkfs.ext4 -L SD_ROOT /dev/sdb2
-
-We'll populate the first partition (boot) with the relevant files:
-
-# mount /dev/sdb1 /mnt
-# cp output/images/at91bootstrap.bin /mnt/BOOT.BIN
-# cp output/images/zImage /mnt
-# cp output/images/at91-ariag25.dtb /mnt
-# umount /mnt
-
-And the root filesystem afterwards:
-
-# mount /dev/sdb2 /mnt
-# tar -C /mnt output/images/rootfs.tar
-# umount /mnt
-
-You're done, insert the MicroSD card in the slot and enjoy.
+To get the kernel log messages you can use a DPI cable
+(http://www.acmesystems.it/DPI)

+You can find additional informations, tutorials and a very
+comprehensive documentation on http://www.acmesystems.it/aria.
--- a/bsp/buildroot/board/acmesystems/arietta-g25/genimage.cfg
+++ b/bsp/buildroot/board/acmesystems/arietta-g25/genimage.cfg
@@ -1,18 +1,18 @@
 # Minimal SD card image for the Acmesystems Arietta G25
-#
+
 image boot.vfat {
 	vfat {
 		file zImage {
 			image = "zImage"
 		}
-
+		
 		file acme-arietta.dtb {
-			image = "at91-ariag25.dtb"
+			image = "at91-ariettag25.dtb"
 		}
-
+		
 		file boot.bin {
-			image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.7.bin"
-		}
+			image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.8.6.bin"
+		} 
 	}
 	size = 16M
 }
--- a/bsp/buildroot/board/acmesystems/arietta-g25/post-image.sh
+++ b/bsp/buildroot/board/acmesystems/arietta-g25/post-image.sh
@@ -6,11 +6,9 @@ GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"

 rm -rf "${GENIMAGE_TMP}"

-genimage                               \
+genimage  \
 	--rootpath "${TARGET_DIR}"     \
 	--tmppath "${GENIMAGE_TMP}"    \
 	--inputpath "${BINARIES_DIR}"  \
 	--outputpath "${BINARIES_DIR}" \
 	--config "${GENIMAGE_CFG}"
-
-exit $?
--- a/bsp/buildroot/board/acmesystems/arietta-g25/readme.txt
+++ b/bsp/buildroot/board/acmesystems/arietta-g25/readme.txt
@@ -1,4 +1,4 @@
-Acmesystems Arietta G25
+Acme Systems Arietta G25

 Intro
 =====
@@ -13,8 +13,8 @@ documentation on http://www.acmesystems.it/arietta.
 Build instructions
 ==================

-To build an image for the arietta g25 choose the configuration
-corresponding to the arietta variant.
+To build an image for the Arietta G25 choose the configuration
+corresponding to the Arietta variant.

 For 128MB RAM variant type:

@@ -24,7 +24,11 @@ else for 256MB RAM variant type:

 $ make acmesystems_arietta_g25_256mb_defconfig

-then:
+To customize the configuration chosen type:
+
+$ make menuconfig
+
+When you are ready to start building Buildroot type:

 $ make

@@ -38,7 +42,7 @@ Copy the bootable "sdcard.img" onto an SD card with "dd":

  $ sudo dd if=output/images/sdcard.img of=/dev/sdX

-Insert the microSD card into the arietta slot and power it.
+Insert the microSD card into the Arietta slot and power it.

 The image just built is fairly basic and the only output
 you will get is on serial console, please consider to use a DPI
--- a/bsp/buildroot/board/arm/juno/readme.txt
+++ b/bsp/buildroot/board/arm/juno/readme.txt
@@ -8,8 +8,8 @@ These instructions apply to all models of the ARM Juno:
  - Juno r1 (supports PCIe)
  - Juno r2 (Big Cluster with A72)

-Buildroot will generate the kernel image, device tree blob and a
-minimal root filesystem.
+Buildroot will generate the kernel image, device tree blob, bootloader binaries
+and a minimal root filesystem.

 How to build it
 ===============
@@ -44,6 +44,20 @@ After building, you should obtain this tree:
    +-- juno-r1.dtb (if Juno r1 is used)
    +-- juno-r2.dtb (if Juno r2 is used)
    +-- Image
+    +-- bl1.bin
+    +-- bl2.bin
+    +-- bl2u.bin
+    +-- bl31.bin
+    +-- fip.bin
+    +-- scp-fw.bin
+    +-- u-boot.bin
+
+Preparing your rootfs
+======================
+
+Format your pen drive as a ext3 filesystem by executing:
+
+   $ mkfs.ext3 /dev/<your device>

 Preparing your rootfs
 ======================
@@ -113,7 +127,8 @@ Installing kernel image and DTB
 3. Open the software/ folder
 4. Copy the 'Image' file to software/
 5. Copy the 'juno-r1.dtb' (r1), 'juno.dtb' (r0) or juno-r2.dtb (r2) file to software/
-6. Press the red button in the front pannel of ARM Juno
+6. Copy the bootloader binaries (bl1.bin and fip.bin) to software/
+7. Press the red button in the front pannel of ARM Juno

 At this time, the board will erase the Flash entry for each new item and
 replace it with the lastest ones.
--- a/bsp/buildroot/board/armadeus/apf28/linux-3.12.config
+++ b/bsp/buildroot/board/armadeus/apf28/linux-3.12.config
@@ -117,8 +117,6 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_BACKLIGHT_GENERIC is not set
 CONFIG_BACKLIGHT_PWM=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
@@ -183,3 +181,5 @@ CONFIG_NLS_ISO8859_1=y
 CONFIG_DEBUG_FS=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
--- a/bsp/buildroot/board/armadeus/apf51/linux-3.12.config
+++ b/bsp/buildroot/board/armadeus/apf51/linux-3.12.config
@@ -20,7 +20,7 @@ CONFIG_BSD_DISKLABEL=y
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_MXC=y
 CONFIG_MXC_IRQ_PRIOR=y
-CONFIG_MACH_IMX51_DT=y
+CONFIG_SOC_IMX51=y
 CONFIG_ARM_THUMBEE=y
 CONFIG_PREEMPT=y
 CONFIG_AEABI=y
@@ -111,7 +111,9 @@ CONFIG_KEYBOARD_GPIO=m
 CONFIG_KEYBOARD_IMX=m
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_WM831X=y
+CONFIG_TOUCHSCREEN_MC13XXX=m
 CONFIG_INPUT_MISC=y
+CONFIG_INPUT_MC13783_PWRBUTTON=m
 CONFIG_INPUT_UINPUT=m
 CONFIG_INPUT_WM831X_ON=y
 # CONFIG_LEGACY_PTYS is not set
@@ -127,19 +129,24 @@ CONFIG_SPI_IMX=y
 CONFIG_SPI_SPIDEV=m
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_WM831X=m
-CONFIG_POWER_SUPPLY=m
+CONFIG_POWER_SUPPLY=y
 CONFIG_WM831X_BACKUP=m
 CONFIG_WM831X_POWER=m
 CONFIG_HWMON=m
 CONFIG_SENSORS_AS1531=m
+CONFIG_SENSORS_MC13783_ADC=m
 CONFIG_SENSORS_WM831X=m
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_WM831X_WATCHDOG=m
 CONFIG_IMX2_WDT=y
+CONFIG_MFD_MC13XXX_I2C=y
 CONFIG_MFD_WM831X_I2C=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_MC13892=m
+CONFIG_IMX_IPUV3_CORE=y
+CONFIG_DRM=y
 CONFIG_MFD_IMX_IPU_V3=y
 CONFIG_MEDIA_SUPPORT=m
 CONFIG_VIDEO_DEV=m
@@ -203,12 +210,13 @@ CONFIG_USB_PRINTER=y
 CONFIG_USB_WDM=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
 CONFIG_USB_CHIPIDEA_HOST=y
 CONFIG_USB_PHY=y
 CONFIG_NOP_USB_XCEIV=y
 CONFIG_USB_GPIO_VBUS=y
 CONFIG_USB_ULPI=y
-CONFIG_USB_GADGET=m
+CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DEBUG_FILES=y
 CONFIG_USB_GADGET_DEBUG_FS=y
 CONFIG_USB_ETH=m
@@ -227,12 +235,19 @@ CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_WM831X_STATUS=m
+CONFIG_LEDS_MC13783=m
 CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_MXC=y
 CONFIG_RTC_DRV_WM831X=y
+CONFIG_RTC_DRV_MC13XXX=m
 CONFIG_STAGING=y
+CONFIG_DRM_IMX=y
+CONFIG_DRM_IMX_FB_HELPER=y
+CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
+CONFIG_DRM_IMX_TVE=y
+CONFIG_DRM_IMX_IPUV3=y
 CONFIG_IIO=m
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
@@ -242,6 +257,7 @@ CONFIG_EXT2_FS_XIP=y
 CONFIG_EXT3_FS=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
 CONFIG_AUTOFS4_FS=y
 CONFIG_ISO9660_FS=y
 CONFIG_JOLIET=y
@@ -249,10 +265,6 @@ CONFIG_ZISOFS=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_CMODE_NONE=y
 CONFIG_UBIFS_FS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
--- a/bsp/buildroot/board/atmel/at91sam9260ek/linux-3.9.config
+++ b/bsp/buildroot/board/atmel/at91sam9260ek/linux-3.9.config
@@ -1,98 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_KERNEL_LZO=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9260=y
-CONFIG_ARCH_AT91SAM9260_SAM9XE=y
-CONFIG_MACH_AT91SAM9260EK=y
-CONFIG_MACH_CAM60=y
-CONFIG_MACH_SAM9_L9260=y
-CONFIG_MACH_AFEB9260=y
-CONFIG_MACH_USB_A9260=y
-CONFIG_MACH_QIL_A9260=y
-CONFIG_MACH_CPU9260=y
-CONFIG_MACH_FLEXIBITY=y
-CONFIG_MACH_SNAPPER_9260=y
-CONFIG_MACH_AT91SAM_DT=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
--- a/bsp/buildroot/board/atmel/readme.txt
+++ b/bsp/buildroot/board/atmel/readme.txt
@@ -13,7 +13,6 @@ This guide covers the following configurations:
 - atmel_sama5d3_xplained_dev_defconfig
 - atmel_sama5d3_xplained_mmc_defconfig
 - atmel_sama5d3_xplained_mmc_dev_defconfig
- - atmel_sama5d4ek_defconfig
 - atmel_sama5d4_xplained_defconfig
 - atmel_sama5d4_xplained_dev_defconfig
 - atmel_sama5d4_xplained_mmc_defconfig
@@ -45,7 +44,7 @@ using SAM-BA" section below.
 For the Xplained boards, an alternative Buildroot configuration is
 provided to boot from an SD card. Those configurations are labeled as
 'mmc'. In this case, after building Buildroot, follow the instructions
-in the "Preparting the SD card" sction.
+in the "Preparing the SD card" section.

 To configure and build Buildroot, run:

--- a/bsp/buildroot/board/atmel/sama5d2_xplained_mmc/genimage.cfg
+++ b/bsp/buildroot/board/atmel/sama5d2_xplained_mmc/genimage.cfg
@@ -23,6 +23,7 @@ image sdcard.img {
 		partition-type = 0xC
 		bootable = "true"
 		image = "boot.vfat"
+		offset = 1M
 	}

 	partition rootfs {
--- a/bsp/buildroot/board/atmel/sama5d3_xplained_mmc/genimage.cfg
+++ b/bsp/buildroot/board/atmel/sama5d3_xplained_mmc/genimage.cfg
@@ -23,6 +23,7 @@ image sdcard.img {
 		partition-type = 0xC
 		bootable = "true"
 		image = "boot.vfat"
+		offset = 1M
 	}

 	partition rootfs {
--- a/bsp/buildroot/board/atmel/sama5d4_xplained_mmc/genimage.cfg
+++ b/bsp/buildroot/board/atmel/sama5d4_xplained_mmc/genimage.cfg
@@ -24,6 +24,7 @@ image sdcard.img {
 		partition-type = 0xC
 		bootable = "true"
 		image = "boot.vfat"
+		offset = 1M
 	}

 	partition rootfs {
--- a/bsp/buildroot/board/beagleboardx15/genimage.cfg
+++ b/bsp/buildroot/board/beagleboardx15/genimage.cfg
@@ -0,0 +1,26 @@
+image boot.vfat {
+	vfat {
+		files = {
+			"MLO",
+			"u-boot.img"
+		}
+	}
+	size = 4M
+}
+
+image sdcard.img {
+	hdimage {
+	}
+
+	partition u-boot {
+		partition-type = 0xC
+		bootable = "true"
+                image = "boot.vfat"
+	}
+
+	partition rootfs {
+		partition-type = 0x83
+		image = "rootfs.ext4"
+		size = 512M
+	}
+}
--- a/bsp/buildroot/board/beagleboardx15/post-image.sh
+++ b/bsp/buildroot/board/beagleboardx15/post-image.sh
@@ -0,0 +1,15 @@
+#!/bin/sh
+
+BOARD_DIR="$(dirname $0)"
+
+GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
+GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
+
+rm -rf "${GENIMAGE_TMP}"
+
+genimage \
+    --rootpath "${TARGET_DIR}" \
+    --tmppath "${GENIMAGE_TMP}" \
+    --inputpath "${BINARIES_DIR}" \
+    --outputpath "${BINARIES_DIR}" \
+    --config "${GENIMAGE_CFG}"
--- a/bsp/buildroot/board/beagleboardx15/readme.txt
+++ b/bsp/buildroot/board/beagleboardx15/readme.txt
@@ -0,0 +1,49 @@
+BeagleBoard X15
+
+Intro
+=====
+This config currently supports the beagleboard x15,
+and generates a barebone image.
+
+The image must be flashed to a SD card to be used.
+
+How to build it
+===============
+
+  $ make beagleboardx15_defconfig
+
+Then you can edit the build options using
+
+  $ make menuconfig
+
+Compile all and build a sdcard image:
+
+  $ make
+
+Result of the build
+-------------------
+
+After building, you should get a tree like this:
+
+  output/images/
+  ├── am57xx-beagle-x15.dtb
+  ├── am57xx-beagle-x15-revb1.dtb
+  ├── boot.vfat
+  ├── MLO
+  ├── rootfs.ext2
+  ├── rootfs.ext4
+  ├── rootfs.tar
+  ├── sdcard.img
+  ├── u-boot.img
+  ├── u-boot-spl.bin
+  └── zImage
+
+How to write the microSD card
+=============================
+
+Once the build process is finished you will have an image called "sdcard.img"
+in the output/images/ directory.
+
+Copy the bootable "sdcard.img" onto an SD card with "dd":
+
+  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
--- a/bsp/buildroot/board/beaglebone/genimage.cfg
+++ b/bsp/buildroot/board/beaglebone/genimage.cfg
@@ -5,8 +5,10 @@ image boot.vfat {
 			"u-boot.img",
 			"zImage",
 			"uEnv.txt",
+			"am335x-evm.dtb",
+			"am335x-evmsk.dtb",
 			"am335x-bone.dtb",
-			"am335x-boneblack.dtb"
+			"am335x-boneblack.dtb",
 		}
 	}
 	size = 16M
--- a/bsp/buildroot/board/beaglebone/linux-3.12.config
+++ b/bsp/buildroot/board/beaglebone/linux-3.12.config
@@ -1,251 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_KPROBES=y
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_OMAP_RESET_CLOCKS=y
-CONFIG_OMAP_MUX_DEBUG=y
-CONFIG_ARCH_OMAP3=y
-CONFIG_ARCH_OMAP4=y
-CONFIG_SOC_AM43XX=y
-# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
-# CONFIG_SOC_TI81XX is not set
-# CONFIG_MACH_OMAP3_BEAGLE is not set
-# CONFIG_MACH_DEVKIT8000 is not set
-# CONFIG_MACH_OMAP_LDP is not set
-# CONFIG_MACH_OMAP3530_LV_SOM is not set
-# CONFIG_MACH_OMAP3_TORPEDO is not set
-# CONFIG_MACH_OVERO is not set
-# CONFIG_MACH_OMAP3EVM is not set
-# CONFIG_MACH_OMAP3_PANDORA is not set
-# CONFIG_MACH_TOUCHBOOK is not set
-# CONFIG_MACH_OMAP_3430SDP is not set
-# CONFIG_MACH_NOKIA_RM680 is not set
-# CONFIG_MACH_NOKIA_RX51 is not set
-# CONFIG_MACH_OMAP_ZOOM2 is not set
-# CONFIG_MACH_OMAP_ZOOM3 is not set
-# CONFIG_MACH_CM_T35 is not set
-# CONFIG_MACH_CM_T3517 is not set
-# CONFIG_MACH_IGEP0020 is not set
-# CONFIG_MACH_IGEP0030 is not set
-# CONFIG_MACH_SBC3530 is not set
-# CONFIG_MACH_OMAP_3630SDP is not set
-CONFIG_ARM_THUMBEE=y
-CONFIG_HAVE_ARM_ARCH_TIMER=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
-CONFIG_KEXEC=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_GENERIC_CPUFREQ_CPU0=y
-# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
-CONFIG_FPE_NWFPE=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_BINFMT_MISC=y
-CONFIG_PM_RUNTIME=y
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_NET_KEY=y
-CONFIG_NET_KEY_MIGRATE=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_OMAP_OCP2SCP=y
-CONFIG_CONNECTOR=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_CROSSBAR=y
-CONFIG_EEPROM_93CX6=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_MD=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CIRRUS is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-CONFIG_TI_CPSW=y
-CONFIG_TI_CPTS=y
-# CONFIG_NET_VENDOR_VIA is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-CONFIG_AT803X_PHY=y
-CONFIG_SMSC_PHY=y
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=32
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_8250_DETECT_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_SERIAL_OMAP=y
-CONFIG_SERIAL_OMAP_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_OMAP=y
-CONFIG_SPI=y
-CONFIG_SPI_OMAP24XX=y
-CONFIG_SPI_TI_QSPI=y
-CONFIG_PINCTRL_SINGLE=y
-CONFIG_DEBUG_GPIO=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_W1=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_THERMAL=y
-CONFIG_THERMAL_GOV_FAIR_SHARE=y
-CONFIG_THERMAL_GOV_USER_SPACE=y
-CONFIG_CPU_THERMAL=y
-CONFIG_TI_SOC_THERMAL=y
-CONFIG_TI_THERMAL=y
-CONFIG_WATCHDOG=y
-CONFIG_OMAP_WATCHDOG=y
-CONFIG_MFD_SYSCON=y
-CONFIG_MFD_TPS65217=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_PBIAS=y
-CONFIG_REGULATOR_TPS65023=y
-CONFIG_REGULATOR_TPS6507X=y
-CONFIG_REGULATOR_TPS65217=y
-CONFIG_REGULATOR_TIAVSCLASS0=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_DA8XX=y
-CONFIG_FB_DA8XX_TDA998X=y
-CONFIG_OMAP2_DSS=y
-CONFIG_OMAP2_DSS_SDI=y
-CONFIG_OMAP2_DSS_DSI=y
-CONFIG_FB_OMAP2=y
-CONFIG_DISPLAY_CONNECTOR_HDMI=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_MUSB_HDRC=m
-CONFIG_USB_MUSB_OMAP2PLUS=m
-CONFIG_USB_MUSB_DSPS=m
-CONFIG_USB_TI_CPPI41_DMA=y
-CONFIG_USB_STORAGE=y
-CONFIG_AM335X_PHY_USB=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DEBUG=y
-CONFIG_USB_GADGET_DEBUG_FS=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_ETH_EEM=y
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_SDIO_UART=y
-CONFIG_MMC_OMAP=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_OMAP=y
-CONFIG_DMADEVICES=y
-CONFIG_TI_EDMA=y
-CONFIG_DMA_OMAP=y
-CONFIG_TI_CPPI41=y
-CONFIG_COMMON_CLK_DEBUG=y
-CONFIG_OMAP_USB2=y
-CONFIG_OMAP_PIPE3=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_EXT4_FS=y
-CONFIG_QUOTA=y
-CONFIG_QFMT_V2=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_INFO=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_SCHEDSTATS=y
-CONFIG_TIMER_STATS=y
-CONFIG_PROVE_LOCKING=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_CRYPTO_MANAGER=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_LZO=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=y
-CONFIG_CRC_T10DIF=y
-CONFIG_CRC_ITU_T=y
-CONFIG_CRC7=y
-CONFIG_LIBCRC32C=y
-CONFIG_AVERAGE=y
--- a/bsp/buildroot/board/beaglebone/linux-4.1-sgx.fragment
+++ b/bsp/buildroot/board/beaglebone/linux-4.1-sgx.fragment
@@ -0,0 +1,12 @@
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_COUNT=y
+CONFIG_OMAP2_DSS_INIT=y
+CONFIG_OMAP_DSS_BASE=y
+CONFIG_OMAP2_DSS=y
+CONFIG_OMAP2_DSS_DPI=y
+CONFIG_DRM_OMAP=y
+CONFIG_DRM_OMAP_NUM_CRTCS=2
+CONFIG_DRM_OMAP_WB_M2M=y
+CONFIG_DRM_TILCDC=y
+CONFIG_DRM_I2C_NXP_TDA998X=y
+CONFIG_DRM=y
--- a/bsp/buildroot/board/beaglebone/patches/linux/0001-keep-jtag-clock-alive-for-debugger.patch
+++ b/bsp/buildroot/board/beaglebone/patches/linux/0001-keep-jtag-clock-alive-for-debugger.patch
@@ -0,0 +1,16 @@
+This patch keeps the debugSS clock alive, it clocks the JTAG macro and enables
+access to the SoC via JTAG after the kernel booted.
+
+Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
+---
+diff -Naur linux-orig/arch/arm/mach-omap2/omap_hwmod_33xx_data.c linux-52c4aa7cdb93d61f8008f380135beaf7b8fa6593/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+--- linux-orig/arch/arm/mach-omap2/omap_hwmod_33xx_data.c	2015-10-02 17:30:56.000000000 +0200
+++ linux-52c4aa7cdb93d61f8008f380135beaf7b8fa6593/arch/arm/mach-omap2/omap_hwmod_33xx_data.c	2016-08-15 11:28:55.017617612 +0200
+@@ -208,6 +208,7 @@
+ 	.name		= "debugss",
+ 	.class		= &am33xx_debugss_hwmod_class,
+ 	.clkdm_name	= "l3_aon_clkdm",
+	.flags		= (HWMOD_INIT_NO_IDLE|HWMOD_INIT_NO_RESET), /* keep debugSS clock alive for JTAG */
+ 	.main_clk	= "trace_clk_div_ck",
+ 	.prcm		= {
+ 		.omap4	= {
--- a/bsp/buildroot/board/beaglebone/patches/linux/linux-0001-arm-Export-cache-flush-management-symbols-when-MULTI.patch
+++ b/bsp/buildroot/board/beaglebone/patches/linux/linux-0001-arm-Export-cache-flush-management-symbols-when-MULTI.patch
@@ -1,34 +0,0 @@
-From 29885f2f3d700341d322274db6ad085e601c0994 Mon Sep 17 00:00:00 2001
-From: Pantelis Antoniou <panto@antoniou-consulting.com>
-Date: Fri, 4 Jan 2013 00:32:33 +0200
-Subject: [PATCH 3/3] arm: Export cache flush management symbols when
- !MULTI_CACHE
-
-When compiling a kernel without CONFIG_MULTI_CACHE enabled the
-dma access functions end up not being exported. Fix it.
-
-Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
---
- arch/arm/kernel/setup.c |    9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
-index da1d1aa..dcb678c 100644
--- a/arch/arm/kernel/setup.c
-+++ b/arch/arm/kernel/setup.c
-@@ -923,3 +923,12 @@ const struct seq_operations cpuinfo_op = {
- 	.stop	= c_stop,
- 	.show	= c_show
- };
-+
-+/* export the cache management functions */
-+#ifndef MULTI_CACHE
-+
-+EXPORT_SYMBOL(__glue(_CACHE,_dma_map_area));
-+EXPORT_SYMBOL(__glue(_CACHE,_dma_unmap_area));
-+EXPORT_SYMBOL(__glue(_CACHE,_dma_flush_range));
-+
-+#endif
-- 
-1.7.10.4
-
--- a/bsp/buildroot/board/beaglebone/post-image.sh
+++ b/bsp/buildroot/board/beaglebone/post-image.sh
@@ -1,6 +1,7 @@
 #!/bin/sh
-# post-image.sh for BeagleBone
+# post-image.sh for CircuitCo BeagleBone and TI am335x-evm
 # 2014, Marcin Jabrzyk <marcin.jabrzyk@gmail.com>
+# 2016, Lothar Felten <lothar.felten@gmail.com>

 BOARD_DIR="$(dirname $0)"

--- a/bsp/buildroot/board/beaglebone/readme.txt
+++ b/bsp/buildroot/board/beaglebone/readme.txt
@@ -1,44 +1,52 @@
-BeagleBone
+CircuitCo BeagleBone
+Texas Instuments AM335x Evaluation Module (TMDXEVM3358)

-Intro
-=====
-To be able to use BeagleBone board with the images generated by
-Buildroot, you have to prepare the SDCard.
+Description
+===========
+
+This configuration will build a complete image for the beaglebone and
+the TI AM335x-EVM, the board type is identified by the on-board
+EEPROM. The configuration is based on the
+ti-processor-sdk-02.00.00.00. Device tree blobs for beaglebone
+variants and the evm-sk are built too.
+
+For Qt5 support support use the beaglebone_qt5_defconfig.

 How to build it
 ===============

-  $ make beaglebone_defconfig
+Select the default configuration for the target:
+$ make beaglebone_defconfig

-Then you can edit the build options using
+Optional: modify the configuration:
+$ make menuconfig

-  $ make menuconfig
-
-Compile all and build rootfs image:
-
-  $ make
+Build:
+$ make

 Result of the build
-------------------
+===================
+output/images/
+├── am335x-boneblack.dtb
+├── am335x-bone.dtb
+├── am335x-evm.dtb
+├── am335x-evmsk.dtb
+├── boot.vfat
+├── MLO
+├── rootfs.ext2
+├── rootfs.tar
+├── sdcard.img
+├── u-boot.img
+├── uEnv.txt
+└── zImage

-After building, you should get a tree like this:
+To copy the image file to the sdcard use dd:
+$ dd if=output/images/sdcard.img of=/dev/XXX

-  output/images/
-  ├── am335x-boneblack.dtb
-  ├── am335x-bone.dtb
-  ├── MLO
-  ├── rootfs.ext2
-  ├── sdcard.img
-  ├── u-boot.img
-  ├── uEnv.txt
-  └── zImage
+Tested hardware
+===============
+am335x-evm (rev. 1.1A)
+beagleboneblack (rev. A5A)
+beaglebone (rev. A6)

-How to write the microSD card
-=============================
-
-Once the build process is finished you will have an image called "sdcard.img"
-in the output/images/ directory.
-
-Copy the bootable "sdcard.img" onto an SD card with "dd":
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
+2016, Lothar Felten <lothar.felten@gmail.com>
--- a/bsp/buildroot/board/beaglebone/uEnv.txt
+++ b/bsp/buildroot/board/beaglebone/uEnv.txt
@@ -1,3 +1,4 @@
 bootpart=0:1
 bootdir=
-uenvcmd=run loadimage;run loadramdisk;run findfdt;run loadfdt;run ramboot
+bootargs=console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
+uenvcmd=run loadimage;run loadfdt;printenv bootargs;bootz ${loadaddr} - ${fdtaddr};
--- a/bsp/buildroot/board/boundarydevices/common/6x_bootscript.txt
+++ b/bsp/buildroot/board/boundarydevices/common/6x_bootscript.txt
@@ -92,14 +92,12 @@ fi

 setenv bootargs "${bootargs} console=${console},115200 vmalloc=400M consoleblank=0 rootwait fixrtc"

-bpart=1
-
 if test "sata" = "${dtype}" ; then
-	setenv bootargs "${bootargs} root=/dev/sda${bpart}" ;
+	setenv bootargs "${bootargs} root=/dev/sda${bootpart}" ;
 elif test "usb" = "${dtype}" ; then
-	setenv bootargs "${bootargs} root=/dev/sda${bpart}" ;
+	setenv bootargs "${bootargs} root=/dev/sda${bootpart}" ;
 else
-	setenv bootargs "${bootargs} root=/dev/mmcblk${disk}p${bpart}"
+	setenv bootargs "${bootargs} root=/dev/mmcblk${disk}p${bootpart}"
 fi

 if itest.s "x" != "x${disable_giga}" ; then
--- a/bsp/buildroot/board/boundarydevices/common/genimage.cfg
+++ b/bsp/buildroot/board/boundarydevices/common/genimage.cfg
@@ -1,13 +1,15 @@
+# Minimal SD card image for Boundary Devices platforms
+#
+# It does not need a boot section for a bootloader since it is booted
+# from its NOR flash memory.
+#
+# To update the bootloader, execute the following from U-Boot prompt:
+# => run upgradeu
+
 image sdcard.img {
 	hdimage {
 	}

-	partition u-boot {
-		in-partition-table = "no"
-		image = "u-boot.imx"
-		offset = 1024
-	}
-
 	partition rootfs {
 		partition-type = 0x83
 		image = "rootfs.ext4"
--- a/bsp/buildroot/board/calao/qil-a9260/linux-3.4.7.config
+++ b/bsp/buildroot/board/calao/qil-a9260/linux-3.4.7.config
@@ -1,111 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9260=y
-CONFIG_MACH_QIL_A9260=y
-CONFIG_AT91_SLOW_CLOCK=y
-CONFIG_AT91_EARLY_USART0=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS1,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_MMC=y
-CONFIG_MMC_AT91=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_M41T94=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_XATTR=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
--- a/bsp/buildroot/board/calao/qil-a9260/patches/at91bootstrap/0001-qil-a9260.patch
+++ b/bsp/buildroot/board/calao/qil-a9260/patches/at91bootstrap/0001-qil-a9260.patch
@@ -1,603 +0,0 @@
-From a3e08beea8bf5e96e1237eef4a82f4a2fdd5286b Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Thu, 19 Jul 2012 14:19:59 +0200
-Subject: [PATCH] Add support for the Calao-systems QIL-A9260
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
- board/qil_a9260/nandflash/Makefile    |  122 ++++++++++++++
- board/qil_a9260/nandflash/qil-a9260.h |  109 ++++++++++++
- board/qil_a9260/qil_a9260.c           |  298 +++++++++++++++++++++++++++++++++
- crt0_gnu.S                            |    7 +
- include/part.h                        |    6 +-
- 5 files changed, 541 insertions(+), 1 deletions(-)
- create mode 100644 board/qil_a9260/nandflash/Makefile
- create mode 100644 board/qil_a9260/nandflash/qil-a9260.h
- create mode 100644 board/qil_a9260/qil_a9260.c
-
-diff --git a/board/qil_a9260/nandflash/Makefile b/board/qil_a9260/nandflash/Makefile
-new file mode 100644
-index 0000000..209a25f
--- /dev/null
-+++ b/board/qil_a9260/nandflash/Makefile
-@@ -0,0 +1,122 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for QIL-A9260
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9260
-+# Board name (case sensitive!!!)
-+BOARD=qil_a9260
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	nandflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	$(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/qil_a9260/nandflash/qil-a9260.h b/board/qil_a9260/nandflash/qil-a9260.h
-new file mode 100644
-index 0000000..c87002e
--- /dev/null
-+++ b/board/qil_a9260/nandflash/qil-a9260.h
-@@ -0,0 +1,109 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : qil-a9260.h
-+ * Object              :
-+ * Creation            : GH July 19th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _QIL_A9260_H
-+#define _QIL_A9260_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(180000000/2)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+#define PLLA_SETTINGS	0x20593F06
-+#define PLLB_SETTINGS	0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE	0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
-+/* Please refer to SMC section in AT91SAM datasheet to learn how 	*/
-+/* to generate these values. 						*/
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP	(1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-+#define AT91C_SM_NRD_SETUP	(1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-+  
-+#define AT91C_SM_NWE_PULSE 	(3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
-+#define AT91C_SM_NRD_PULSE	(3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
-+  
-+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
-+#define AT91C_SM_NRD_CYCLE	(5 << 16)
-+#define AT91C_SM_TDF	        (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 		0x20000		/* Image Address in NandFlash */
-+#define	IMG_SIZE		0x40000		/* Image Size in NandFlash    */
-+
-+#define MACH_TYPE       	0x6AF		/* QIL-A9260 */
-+#define JUMP_ADDR		0x23F00000	/* Final Jump Address 	      */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+
-+#endif	/* _QIL_A9260_H */
-diff --git a/board/qil_a9260/qil_a9260.c b/board/qil_a9260/qil_a9260.c
-new file mode 100644
-index 0000000..ae122e7
--- /dev/null
-+++ b/board/qil_a9260/qil_a9260.c
-@@ -0,0 +1,298 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaiimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : qil_a9260.c
-+ * Object              :
-+ * Creation            : GH July 19th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+	unsigned int value;
-+	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+	return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn    hw_init							      */
-+/* \brief This function performs very low level HW initialization	      */
-+/* This function is invoked as soon as possible during the c_startup	      */
-+/* The bss segment must be initialized					      */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+	unsigned int cp15;
-+	
-+	/* Configure PIOs */
-+	const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Disable watchdog */
-+	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+	/* At this stage the main oscillator is supposed to be enabled
-+	 * PCK = MCK = MOSC */
-+
-+	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* PCK = PLLA = 2 * MCK */
-+	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+	/* Switch MCK on PLLA output */
-+	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure PLLB */
-+	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure CP15 */
-+	cp15 = get_cp15();
-+	cp15 |= I_CACHE;
-+	set_cp15(cp15);
-+
-+	/* Configure the PIO controller */
-+	pio_setup(hw_pio);
-+
-+	/* Configure the EBI Slave Slot Cycle to 64 */
-+	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+	/* Enable Debug messages on the DBGU */
-+	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+	dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+	/* Initialize the matrix */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+	/* Configure SDRAM Controller */
-+	sdram_init(	AT91C_SDRAMC_NC_9  |
-+				AT91C_SDRAMC_NR_13 |
-+				AT91C_SDRAMC_CAS_2 |
-+				AT91C_SDRAMC_NB_4_BANKS |
-+				AT91C_SDRAMC_DBW_32_BITS |
-+				AT91C_SDRAMC_TWR_2 |
-+				AT91C_SDRAMC_TRC_7 |
-+				AT91C_SDRAMC_TRP_2 |
-+				AT91C_SDRAMC_TRCD_2 |
-+				AT91C_SDRAMC_TRAS_5 |
-+				AT91C_SDRAMC_TXSR_8,		/* Control Register */
-+				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
-+				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
-+
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn    sdramc_hw_init							*/
-+/* \brief This function performs SDRAMC HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+	/* Configure PIOs */
-+/*	const struct pio_desc sdramc_pio[] = {
-+		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+*/
-+	/* Configure the SDRAMC PIO controller to output PCK0 */
-+/*	pio_setup(sdramc_pio); */
-+
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_DATAFLASH
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_recovery								*/
-+/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USR PB is pressed during Boot sequence */
-+	/* Erase DataFlash Page 0*/
-+	if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+		df_page_erase(pDf, 0);
-+#endif
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_hw_init								*/
-+/* \brief This function performs DataFlash HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc df_pio[] = {
-+		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nand_recovery						*/
-+/* \brief This function erases NandFlash Block 0 if USR PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USR PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if (!pio_get_value(AT91C_PIN_PB(10)) )
-+		AT91F_NandEraseBlock0();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_hw_init							*/
-+/* \brief NandFlash HW init							*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc nand_pio[] = {
-+		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+		    
-+	/* Configure SMC CS3 */
-+ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
-+	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
-+  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(nand_pio);
-+	
-+	nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_16bits_dbw_init						*/
-+/* \brief Configure SMC in 16 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_8bits_dbw_init						*/
-+/* \brief Configure SMC in 8 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
--- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
- 
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+	ldr 	r0,=AT91C_PMC_MOR
-+	ldr 	r1, [r0]
-+	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
-+	ands 	r1, r1, r2
-+	bne	_init_data	/* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- 	ldr 	r0,=AT91C_PMC_SR
- 	ldr 	r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..bbd33fe 100644
--- a/include/part.h
-+++ b/include/part.h
-@@ -35,7 +35,11 @@
- 
- #ifdef AT91SAM9260
- #include "AT91SAM9260_inc.h"
-#include "at91sam9260ek.h"
-+	#ifdef at91sam9260ek
-+	#include "at91sam9260ek.h"
-+	#elif qil_a9260
-+	#include "qil-a9260.h"
-+	#endif
- #endif
- 
- #ifdef AT91SAM9XE
-- 
-1.5.6.3
-
--- a/bsp/buildroot/board/calao/qil-a9260/patches/barebox/0001-qil-a9260.patch
+++ b/bsp/buildroot/board/calao/qil-a9260/patches/barebox/0001-qil-a9260.patch
@@ -1,36 +0,0 @@
-From d076aa6182dc6df6bb311e60bbddb03573b9483b Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Fri, 3 Aug 2012 11:25:49 +0200
-Subject: [PATCH] Enable pull-up on Rx serial ports for the CALAO MB-QIL-A9260
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
- arch/arm/boards/qil-a9260/init.c |    6 ++++++
- 1 files changed, 6 insertions(+), 0 deletions(-)
-
-diff --git a/arch/arm/boards/qil-a9260/init.c b/arch/arm/boards/qil-a9260/init.c
-index 305d733..b43cace 100644
--- a/arch/arm/boards/qil-a9260/init.c
-+++ b/arch/arm/boards/qil-a9260/init.c
-@@ -196,11 +196,17 @@ device_initcall(qil_a9260_devices_init);
- static int qil_a9260_console_init(void)
- {
- 	at91_register_uart(0, 0);
-+	at91_set_A_periph(AT91_PIN_PB14, 1);    /* Enable pull-up on DRXD */
-+
- 	at91_register_uart(1, ATMEL_UART_CTS | ATMEL_UART_RTS
- 			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
- 			   | ATMEL_UART_RI);
-+
- 	at91_register_uart(2, ATMEL_UART_CTS | ATMEL_UART_RTS);
-+	at91_set_A_periph(AT91_PIN_PB7, 1);	/* Enable pull-up on RXD1 */
-+
- 	at91_register_uart(3, ATMEL_UART_CTS | ATMEL_UART_RTS);
-+	at91_set_A_periph(AT91_PIN_PB9, 1);	/* Enable pull-up on RXD2 */
- 
- 	return 0;
- }
-- 
-1.5.6.3
-
--- a/bsp/buildroot/board/calao/qil-a9260/patches/linux/0001-qil-a9260.patch
+++ b/bsp/buildroot/board/calao/qil-a9260/patches/linux/0001-qil-a9260.patch
@@ -1,27 +0,0 @@
-From fe6432a9728b62bce3db73c5a4efe026018fd495 Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Fri, 3 Aug 2012 16:45:37 +0200
-Subject: [PATCH] QIL-A9260: rtc modalias m41t48 renamed to rtc-m41t48
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
- arch/arm/mach-at91/board-qil-a9260.c |    2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
-
-diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
-index bf351e2..c0df05c 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
-+++ b/arch/arm/mach-at91/board-qil-a9260.c
-@@ -78,7 +78,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
- static struct spi_board_info ek_spi_devices[] = {
- #if defined(CONFIG_RTC_DRV_M41T94)
- 	{	/* M41T94 RTC */
-		.modalias	= "m41t94",
-+		.modalias	= "rtc-m41t94",
- 		.chip_select	= 0,
- 		.max_speed_hz	= 1 * 1000 * 1000,
- 		.bus_num	= 0,
-- 
-1.5.6.3
-
--- a/bsp/buildroot/board/calao/tny-a9g20-lpw/at91bootstrap-1.16-tny-a9g20-lpw.patch
+++ b/bsp/buildroot/board/calao/tny-a9g20-lpw/at91bootstrap-1.16-tny-a9g20-lpw.patch
@@ -1,551 +0,0 @@
-From 53bd82b122f4530a98cba45795832820bb1d0b45 Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Mon, 13 Aug 2012 11:26:10 +0200
-Subject: [PATCH] Add support for the Calao-systems TNY-A9G20-LPW
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
- board/tny_a9g20_lpw/nandflash/Makefile        |  121 ++++++++++++
- board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h |  114 ++++++++++++
- board/tny_a9g20_lpw/tny_a9g20_lpw.c           |  243 +++++++++++++++++++++++++
- crt0_gnu.S                                    |    6 +
- include/part.h                                |    6 +-
- 5 files changed, 489 insertions(+), 1 deletion(-)
- create mode 100644 board/tny_a9g20_lpw/nandflash/Makefile
- create mode 100644 board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
- create mode 100644 board/tny_a9g20_lpw/tny_a9g20_lpw.c
-
-diff --git a/board/tny_a9g20_lpw/nandflash/Makefile b/board/tny_a9g20_lpw/nandflash/Makefile
-new file mode 100644
-index 0000000..7efbea7
--- /dev/null
-+++ b/board/tny_a9g20_lpw/nandflash/Makefile
-@@ -0,0 +1,121 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for AT91SAM9260EK
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9G20
-+# Board name (case sensitive!!!)
-+BOARD=tny_a9g20_lpw
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	nandflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	$(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
-new file mode 100644
-index 0000000..b1f8a1d
--- /dev/null
-+++ b/board/tny_a9g20_lpw/nandflash/tny-a9g20-lpw.h
-@@ -0,0 +1,114 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : tny-a9g20-lpw.h
-+ * Object              :
-+ * Creation            : GH August 13th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _TNY_A9G20_LPW_H
-+#define _TNY_A9G20_LPW_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(100000000)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+/* set PLLA to 800Mhz from MAINCK= 12Mhz MULA=199 (0xC7+1= 200), DIVA=0x03 (Fplla=12Mhz x [(199+1)/3]=800Mhz) */
-+#define PLLA_SETTINGS   0x20C73F03
-+#define PLLB_SETTINGS   0x100F3F02
-+
-+/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
-+/* LP-SDRAM (fmax=100Mhz) PDIV=0 => PRESCALER CLK=PCLK; */
-+/* MDIV = 2 => PRESCALER CLK / 4 = MCLK=100Mhz */
-+/* PRESCALER CLK = PLLA (800Mhz) / 2 (PRES=1) = 400Mhz */
-+#define MCKR_SETTINGS           0x0204 
-+#define MCKR_CSS_SETTINGS       (AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE	0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 100000000.*/
-+/* Please refer to SMC section in AT91SAM9 datasheet to learn how 	*/
-+/* to generate these values. 						*/
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP	(1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-+#define AT91C_SM_NRD_SETUP	(1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-+  
-+#define AT91C_SM_NWE_PULSE 	(3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
-+#define AT91C_SM_NRD_PULSE	(3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
-+  
-+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
-+#define AT91C_SM_NRD_CYCLE	(5 << 16)
-+
-+#define AT91C_SM_TDF	        (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 		0x20000			/* Image Address in NandFlash */
-+#define	IMG_SIZE		0x40000			/* Image Size in NandFlash */
-+
-+#define MACH_TYPE		0x80B			/* TNY-A9G20 */
-+#define JUMP_ADDR		0x23F00000		/* Final Jump Address */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define	CFG_SDRAM
-+#define	CFG_HW_INIT
-+
-+#endif	/* _TNY_A9G20_LPW_H */
-diff --git a/board/tny_a9g20_lpw/tny_a9g20_lpw.c b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
-new file mode 100644
-index 0000000..cef9055
--- /dev/null
-+++ b/board/tny_a9g20_lpw/tny_a9g20_lpw.c
-@@ -0,0 +1,243 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : tny_a9g20_lpw.c
-+ * Object              :
-+ * Creation            : GH August 13th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+	unsigned int value;
-+	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+	return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn    hw_init							      */
-+/* \brief This function performs very low level HW initialization	      */
-+/* This function is invoked as soon as possible during the c_startup	      */
-+/* The bss segment must be initialized					      */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+	unsigned int cp15;
-+	
-+	/* Configure PIOs */
-+	const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Disable watchdog */
-+	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+	/* At this stage the main oscillator is supposed to be enabled
-+	 * PCK = MCK = MOSC */
-+	writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
-+
-+	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* PCK = PLLA/2 = 3 * MCK */
-+	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+	/* Switch MCK on PLLA output */
-+	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure PLLB */
-+	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure CP15 */
-+	cp15 = get_cp15();
-+	cp15 |= I_CACHE;
-+	set_cp15(cp15);
-+
-+	/* Configure the PIO controller */
-+	pio_setup(hw_pio);
-+
-+	/* Configure the EBI Slave Slot Cycle to 64 */
-+	writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+	/* Enable Debug messages on the DBGU */
-+	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+	dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+	/* Initialize the matrix (slow slew rate enabled and LPSDRAM memory voltage = 1.8V) */
-+	writel(((readl(AT91C_BASE_CCFG + CCFG_EBICSA)) | AT91C_EBI_CS1A_SDRAMC | (1<<17)) & ~0x00010000, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+	/* Configure SDRAM Controller */
-+	sdram_init(	AT91C_SDRAMC_NC_9  |
-+				AT91C_SDRAMC_NR_13 |
-+				AT91C_SDRAMC_CAS_3 |
-+				AT91C_SDRAMC_NB_4_BANKS |
-+				AT91C_SDRAMC_DBW_32_BITS |
-+				AT91C_SDRAMC_TWR_2 |
-+				AT91C_SDRAMC_TRC_7 |
-+				AT91C_SDRAMC_TRP_2 |
-+				AT91C_SDRAMC_TRCD_2 |
-+				AT91C_SDRAMC_TRAS_5 |
-+				AT91C_SDRAMC_TXSR_8,		/* Control Register */
-+				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
-+                                AT91C_SDRAMC_MD_LOW_POWER_SDRAM); /* SDRAM (low power)   */
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn    sdramc_hw_init							*/
-+/* \brief This function performs SDRAMC HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+	/* Configure PIOs */
-+/*	const struct pio_desc sdramc_pio[] = {
-+		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+*/
-+	/* Configure the SDRAMC PIO controller to output PCK0 */
-+/*	pio_setup(sdramc_pio); */
-+
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nand_recovery						*/
-+/* \brief This function erases NandFlash Block 0 if BP4 is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc bp4_pio[] = {
-+		{"BP4", AT91C_PIN_PA(31), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(bp4_pio);
-+	
-+	/* If BP4 is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if (!pio_get_value(AT91C_PIN_PA(31)) )
-+		AT91F_NandEraseBlock0();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_hw_init							*/
-+/* \brief NandFlash HW init							*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc nand_pio[] = {
-+		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+		    
-+	/* Configure SMC CS3 */
-+ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
-+	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
-+  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(nand_pio);
-+	
-+	nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_16bits_dbw_init						*/
-+/* \brief Configure SMC in 16 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_8bits_dbw_init						*/
-+/* \brief Configure SMC in 8 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..c6cd49d 100644
--- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,12 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
- 
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+	ldr 	r0,=AT91C_PMC_MOR
-+	ldr 	r1, [r0]
-+	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
-+	ands 	r1, r1, r2
-+	bne	_init_data	/* branch if OSCBYPASS=1 */
- /* Test if main oscillator is enabled */
- 	ldr 	r0,=AT91C_PMC_SR
- 	ldr 	r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..ab79af1 100644
--- a/include/part.h
-+++ b/include/part.h
-@@ -46,7 +46,11 @@
- 
- #ifdef AT91SAM9G20
- #include "AT91SAM9260_inc.h"
-#include "at91sam9g20ek.h"
-+	#ifdef at91sam9g20ek
-+	#include "at91sam9g20ek.h"
-+	#elif tny_a9g20_lpw
-+	#include "tny-a9g20-lpw.h"
-+	#endif
- #endif
- 
- #ifdef AT91SAM9261
-- 
-1.7.9.5
-
--- a/bsp/buildroot/board/calao/tny-a9g20-lpw/linux-3.9.config
+++ b/bsp/buildroot/board/calao/tny-a9g20-lpw/linux-3.9.config
@@ -1,187 +0,0 @@
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_EMBEDDED=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_SOC_AT91SAM9260=y
-CONFIG_SOC_AT91SAM9263=y
-CONFIG_SOC_AT91SAM9G45=y
-CONFIG_SOC_AT91SAM9X5=y
-CONFIG_SOC_AT91SAM9N12=y
-CONFIG_MACH_AT91SAM_DT=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-CONFIG_AT91_TIMER_HZ=128
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_UACCESS_WITH_MEMCPY=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
-CONFIG_KEXEC=y
-CONFIG_AUTO_ZRELADDR=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-CONFIG_IPV6=y
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
-CONFIG_IPV6_SIT_6RD=y
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_GLUEBI=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=4
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_PWM=y
-CONFIG_ATMEL_TCLIB=y
-CONFIG_EEPROM_93CX6=m
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-CONFIG_DAVICOM_PHY=y
-CONFIG_MICREL_PHY=y
-# CONFIG_WLAN is not set
-CONFIG_INPUT_POLLDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_SERIO is not set
-CONFIG_LEGACY_PTY_COUNT=4
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-CONFIG_SSB=m
-CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_ATMEL=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_ATMEL_LCDC=y
-# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_ACORN_8x8=y
-CONFIG_FONT_MINI_4x6=y
-CONFIG_LOGO=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_AT91=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_ACM_MS=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_MMC=y
-CONFIG_MMC_ATMELMCI=y
-CONFIG_MMC_SPI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91RM9200=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_DMADEVICES=y
-# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_FANOTIFY=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_FS=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO_ECB=y
-CONFIG_CRYPTO_ARC4=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_USER_API_HASH=m
-CONFIG_CRYPTO_USER_API_SKCIPHER=m
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=m
-CONFIG_AVERAGE=y
--- a/bsp/buildroot/board/calao/usb-a9260/at91bootstrap-1.16-usb-a9260.patch
+++ b/bsp/buildroot/board/calao/usb-a9260/at91bootstrap-1.16-usb-a9260.patch
@@ -1,603 +0,0 @@
-From 43e8c90f13806405bde8eaaf3a956d0ddc806f64 Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Tue, 2 Oct 2012 09:19:15 +0200
-Subject: [PATCH] Add support for the USB-A9260
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
- board/usb_a9260/nandflash/Makefile    |  122 ++++++++++++++
- board/usb_a9260/nandflash/usb-a9260.h |  109 ++++++++++++
- board/usb_a9260/usb_a9260.c           |  298 +++++++++++++++++++++++++++++++++
- crt0_gnu.S                            |    7 +
- include/part.h                        |    6 +-
- 5 files changed, 541 insertions(+), 1 deletion(-)
- create mode 100644 board/usb_a9260/nandflash/Makefile
- create mode 100644 board/usb_a9260/nandflash/usb-a9260.h
- create mode 100644 board/usb_a9260/usb_a9260.c
-
-diff --git a/board/usb_a9260/nandflash/Makefile b/board/usb_a9260/nandflash/Makefile
-new file mode 100644
-index 0000000..02f4b50
--- /dev/null
-+++ b/board/usb_a9260/nandflash/Makefile
-@@ -0,0 +1,122 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for USB-A9260
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9260
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9260
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	nandflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	$(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/usb_a9260/nandflash/usb-a9260.h b/board/usb_a9260/nandflash/usb-a9260.h
-new file mode 100644
-index 0000000..2aaf759
--- /dev/null
-+++ b/board/usb_a9260/nandflash/usb-a9260.h
-@@ -0,0 +1,109 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb-a9260.h
-+ * Object              :
-+ * Creation            : GH Oct 1th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9260_H
-+#define _USB_A9260_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(180000000/2)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+#define PLLA_SETTINGS	0x20593F06
-+#define PLLB_SETTINGS	0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE	0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000.*/
-+/* Please refer to SMC section in AT91SAM datasheet to learn how 	*/
-+/* to generate these values. 						*/
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP	(1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-+#define AT91C_SM_NRD_SETUP	(1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-+  
-+#define AT91C_SM_NWE_PULSE 	(3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
-+#define AT91C_SM_NRD_PULSE	(3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
-+  
-+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
-+#define AT91C_SM_NRD_CYCLE	(5 << 16)
-+#define AT91C_SM_TDF	        (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 		0x20000		/* Image Address in NandFlash */
-+#define	IMG_SIZE		0x40000		/* Image Size in NandFlash    */
-+
-+#define MACH_TYPE       	0x6AD		/* USB-A9260 */
-+#define JUMP_ADDR		0x23F00000	/* Final Jump Address 	      */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+
-+#endif	/* _USB_A9260_H */
-diff --git a/board/usb_a9260/usb_a9260.c b/board/usb_a9260/usb_a9260.c
-new file mode 100644
-index 0000000..de30f0b
--- /dev/null
-+++ b/board/usb_a9260/usb_a9260.c
-@@ -0,0 +1,298 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaiimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb_a9260.c
-+ * Object              :
-+ * Creation            : GH Oct 1th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+	unsigned int value;
-+	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+	return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn    hw_init							      */
-+/* \brief This function performs very low level HW initialization	      */
-+/* This function is invoked as soon as possible during the c_startup	      */
-+/* The bss segment must be initialized					      */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+	unsigned int cp15;
-+	
-+	/* Configure PIOs */
-+	const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Disable watchdog */
-+	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+	/* At this stage the main oscillator is supposed to be enabled
-+	 * PCK = MCK = MOSC */
-+
-+	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* PCK = PLLA = 2 * MCK */
-+	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+	/* Switch MCK on PLLA output */
-+	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure PLLB */
-+	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure CP15 */
-+	cp15 = get_cp15();
-+	cp15 |= I_CACHE;
-+	set_cp15(cp15);
-+
-+	/* Configure the PIO controller */
-+	pio_setup(hw_pio);
-+
-+	/* Configure the EBI Slave Slot Cycle to 64 */
-+	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+	/* Enable Debug messages on the DBGU */
-+	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+	dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+	/* Initialize the matrix */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+	/* Configure SDRAM Controller */
-+	sdram_init(	AT91C_SDRAMC_NC_9  |
-+				AT91C_SDRAMC_NR_13 |
-+				AT91C_SDRAMC_CAS_2 |
-+				AT91C_SDRAMC_NB_4_BANKS |
-+				AT91C_SDRAMC_DBW_32_BITS |
-+				AT91C_SDRAMC_TWR_2 |
-+				AT91C_SDRAMC_TRC_7 |
-+				AT91C_SDRAMC_TRP_2 |
-+				AT91C_SDRAMC_TRCD_2 |
-+				AT91C_SDRAMC_TRAS_5 |
-+				AT91C_SDRAMC_TXSR_8,		/* Control Register */
-+				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
-+				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
-+
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn    sdramc_hw_init							*/
-+/* \brief This function performs SDRAMC HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+	/* Configure PIOs */
-+/*	const struct pio_desc sdramc_pio[] = {
-+		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+*/
-+	/* Configure the SDRAMC PIO controller to output PCK0 */
-+/*	pio_setup(sdramc_pio); */
-+
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_DATAFLASH
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_recovery								*/
-+/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USR PB is pressed during Boot sequence */
-+	/* Erase DataFlash Page 0*/
-+	if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+		df_page_erase(pDf, 0);
-+#endif
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_hw_init								*/
-+/* \brief This function performs DataFlash HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc df_pio[] = {
-+		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nand_recovery						*/
-+/* \brief This function erases NandFlash Block 0 if USR PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USR PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if (!pio_get_value(AT91C_PIN_PB(10)) )
-+		AT91F_NandEraseBlock0();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_hw_init							*/
-+/* \brief NandFlash HW init							*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc nand_pio[] = {
-+		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+		    
-+	/* Configure SMC CS3 */
-+ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
-+	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
-+  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(nand_pio);
-+	
-+	nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_16bits_dbw_init						*/
-+/* \brief Configure SMC in 16 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_8bits_dbw_init						*/
-+/* \brief Configure SMC in 8 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
--- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
- 
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+	ldr 	r0,=AT91C_PMC_MOR
-+	ldr 	r1, [r0]
-+	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
-+	ands 	r1, r1, r2
-+	bne	_init_data	/* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- 	ldr 	r0,=AT91C_PMC_SR
- 	ldr 	r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..212789f 100644
--- a/include/part.h
-+++ b/include/part.h
-@@ -35,7 +35,11 @@
- 
- #ifdef AT91SAM9260
- #include "AT91SAM9260_inc.h"
-#include "at91sam9260ek.h"
-+	#ifdef at91sam9260ek
-+	#include "at91sam9260ek.h"
-+	#elif usb_a9260
-+	#include "usb-a9260.h"
-+	#endif
- #endif
- 
- #ifdef AT91SAM9XE
-- 
-1.7.9.5
-
--- a/bsp/buildroot/board/calao/usb-a9260/linux-3.7.4.config
+++ b/bsp/buildroot/board/calao/usb-a9260/linux-3.7.4.config
@@ -1,97 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9260=y
-CONFIG_MACH_USB_A9260=y
-CONFIG_AT91_SLOW_CLOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
--- a/bsp/buildroot/board/calao/usb-a9263/at91bootstrap-1.16-usb-a9263.patch
+++ b/bsp/buildroot/board/calao/usb-a9263/at91bootstrap-1.16-usb-a9263.patch
@@ -1,851 +0,0 @@
-From 74796655212d321f50ab89e8c5570245901f4cba Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Thu, 5 Jul 2012 18:44:07 +0200
-Subject: [PATCH] Add support for the Calao-systems USB-A9263
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
- board/usb_a9263/dataflash/Makefile    |  115 +++++++++++++
- board/usb_a9263/dataflash/usb-a9263.h |   97 +++++++++++
- board/usb_a9263/nandflash/Makefile    |  117 ++++++++++++++
- board/usb_a9263/nandflash/usb-a9263.h |  116 +++++++++++++
- board/usb_a9263/usb_a9263.c           |  285 +++++++++++++++++++++++++++++++++
- crt0_gnu.S                            |    7 +
- driver/dataflash.c                    |    6 +-
- include/part.h                        |    6 +-
- 8 files changed, 745 insertions(+), 4 deletions(-)
- create mode 100644 board/usb_a9263/dataflash/Makefile
- create mode 100644 board/usb_a9263/dataflash/usb-a9263.h
- create mode 100644 board/usb_a9263/nandflash/Makefile
- create mode 100644 board/usb_a9263/nandflash/usb-a9263.h
- create mode 100644 board/usb_a9263/usb_a9263.c
-
-diff --git a/board/usb_a9263/dataflash/Makefile b/board/usb_a9263/dataflash/Makefile
-new file mode 100644
-index 0000000..332685e
--- /dev/null
-+++ b/board/usb_a9263/dataflash/Makefile
-@@ -0,0 +1,115 @@
-+# TODO: set this appropriately for your local toolchain
-+#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
-+CROSS_COMPILE=arm-elf-
-+#CROSS_COMPILE = arm-softfloat-linux-gnu-
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# DataFlashBoot Configuration for USB-A9263
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9263
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9263
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x300000
-+TOP_OF_MEMORY=0x314000
-+# Name of current directory
-+PROJECT=dataflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm9 -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib  -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	dataflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+	
-+	
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	rm -f *.o *.bin *.elf *.map
-diff --git a/board/usb_a9263/dataflash/usb-a9263.h b/board/usb_a9263/dataflash/usb-a9263.h
-new file mode 100644
-index 0000000..40a3af8
--- /dev/null
-+++ b/board/usb_a9263/dataflash/usb-a9263.h
-@@ -0,0 +1,97 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb-a9263.h
-+ * Object              :
-+ * Creation            : GH Jun 28th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9263_H
-+#define _USB_A9263_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(180000000/2)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+#define PLLA_SETTINGS	0x20593F06
-+#define PLLB_SETTINGS	0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* DataFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_BASE_SPI	AT91C_BASE_SPI0
-+#define AT91C_ID_SPI	AT91C_ID_SPI0
-+
-+/* SPI CLOCK */
-+#define AT91C_SPI_CLK 		 8000000
-+/* AC characteristics */
-+/* DLYBS = tCSS= 250ns min and DLYBCT = tCSH = 250ns */
-+#define DATAFLASH_TCSS		(0x1a << 16)	/* 250ns min (tCSS) <=> 12/48000000 = 250ns */
-+#define DATAFLASH_TCHS		(0x1 << 24)	/* 250ns min (tCSH) <=> (64*1+SCBR)/(2*48000000) */
-+
-+#define DF_CS_SETTINGS 		(AT91C_SPI_NCPHA | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) | ((MASTER_CLOCK / AT91C_SPI_CLK) << 8))
-+
-+/* ******************************************************************* */
-+/* SDRAMC Settings                                                     */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_BASE_SDRAMC 	AT91C_BASE_SDRAMC0
-+#define AT91C_EBI_SDRAM		AT91C_EBI0_SDRAM
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SPI_PCS_DATAFLASH		AT91C_SPI_PCS0_DATAFLASH	/* Boot on SPI NCS0 */
-+
-+#define IMG_ADDRESS 			0x4000			/* Image Address in DataFlash */
-+#define	IMG_SIZE			0x40000			/* Image Size in DataFlash    */
-+
-+#define MACH_TYPE       		0x6AE       		/* USB-A9263 */
-+#define JUMP_ADDR			0x23F00000		/* Final Jump Address 	      */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+#undef	CFG_DEBUG
-+
-+#define CFG_DATAFLASH
-+
-+#endif	/* _USB_A9263_H */
-diff --git a/board/usb_a9263/nandflash/Makefile b/board/usb_a9263/nandflash/Makefile
-new file mode 100644
-index 0000000..c453098
--- /dev/null
-+++ b/board/usb_a9263/nandflash/Makefile
-@@ -0,0 +1,117 @@
-+# TODO: set this appropriately for your local toolchain
-+#SHELL=C:\CYGWIN_REP\dwn_071004\bin\BASH.exe
-+CROSS_COMPILE=arm-elf-
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for USB-A9263
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9263
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9263
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x300000
-+TOP_OF_MEMORY=0x314000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm9 -O0 -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm9 -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib  -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	nandflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+	
-+	
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	rm -f *.o *.bin *.elf *.map
-diff --git a/board/usb_a9263/nandflash/usb-a9263.h b/board/usb_a9263/nandflash/usb-a9263.h
-new file mode 100644
-index 0000000..24e2cf1
--- /dev/null
-+++ b/board/usb_a9263/nandflash/usb-a9263.h
-@@ -0,0 +1,116 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb-a9263.h
-+ * Object              :
-+ * Creation            : GH Jun 28th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9263_H
-+#define _USB_A9263_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(180000000/2)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+#define PLLA_SETTINGS	0x20593F06
-+#define PLLB_SETTINGS	0x10483F0E
-+
-+/* Switch MCK on PLLA output PCK = PLLA = 2 * MCK */
-+#define MCKR_SETTINGS		(AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2)
-+#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE	0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOD_SODR = AT91C_PIO_PD15;} while(0)
-+#define NAND_ENABLE_CE()  do { *(volatile unsigned int *)AT91C_PIOD_CODR = AT91C_PIO_PD15;} while(0)
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOA_PDSR & AT91C_PIO_PA22))
-+
-+/* ******************************************************************* */
-+/* SDRAMC Settings                                                     */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_BASE_SDRAMC 	AT91C_BASE_SDRAMC0
-+#define AT91C_EBI_SDRAM		AT91C_EBI0_SDRAM
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 90000000. */
-+/* Please refer to SMC section in AT91SAM9x datasheet to learn how 	*/
-+/* to generate these values. 						*/
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP	(1 << 0)
-+#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-+#define AT91C_SM_NRD_SETUP	(1 << 16)
-+#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-+  
-+#define AT91C_SM_NWE_PULSE 	(3 << 0)
-+#define AT91C_SM_NCS_WR_PULSE	(3 << 8)
-+#define AT91C_SM_NRD_PULSE	(3 << 16)
-+#define AT91C_SM_NCS_RD_PULSE	(3 << 24)
-+  
-+#define AT91C_SM_NWE_CYCLE 	(5 << 0)
-+#define AT91C_SM_NRD_CYCLE	(5 << 16)
-+
-+#define AT91C_SM_TDF	        (2 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 	0x20000		/* Image Address in NandFlash */
-+#define	IMG_SIZE	0x40000		/* Image Size in NandFlash    */
-+
-+#define MACH_TYPE       0x6AE  		/* USB-A9263 */
-+#define JUMP_ADDR	0x23F00000	/* Final Jump Address 	      */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
-+
-+#define CFG_HW_INIT
-+#define CFG_SDRAM
-+
-+
-+#endif	/* _USB_A9263_H */
-diff --git a/board/usb_a9263/usb_a9263.c b/board/usb_a9263/usb_a9263.c
-new file mode 100644
-index 0000000..5630f99
--- /dev/null
-+++ b/board/usb_a9263/usb_a9263.c
-@@ -0,0 +1,285 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2006, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaiimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb_a9263.c
-+ * Object              :
-+ * Creation            : GH Jun 28th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+	unsigned int value;
-+	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+	return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+
-+#ifdef CFG_HW_INIT
-+/*---------------------------------------------------------------------------- */
-+/* \fn    hw_init							       */
-+/* \brief This function performs very low level HW initialization	       */
-+/* This function is invoked as soon as possible during the c_startup	       */
-+/* The bss segment must be initialized					       */
-+/*---------------------------------------------------------------------------- */
-+void hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+		{"RXD", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"TXD", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Disable watchdog */
-+	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+	/* At this stage the main oscillator is supposed to be enabled
-+	 * PCK = MCK = MOSC */
-+
-+	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* PCK = PLLA = 2 * MCK */
-+	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+	/* Switch MCK on PLLA output */
-+	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+
-+	/* Configure PLLB */
-+	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure the PIO controller to output PCK0 */
-+	pio_setup(hw_pio);
-+
-+	/* Configure the EBI0 Slave Slot Cycle to 64 */
-+	writel( (readl((AT91C_BASE_MATRIX + MATRIX_SCFG4)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG4));
-+
-+#ifdef CFG_DEBUG
-+	/* Enable Debug messages on the DBGU */
-+	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+	dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+	/* Initialize the matrix */
-+	/* VDDIOMSEL = 1 -> Memories are 3.3V powered */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | (1 << 16) | AT91C_EBI_CS1A_SDRAMC, AT91C_BASE_CCFG + CCFG_EBI0CSA);
-+
-+	/* Configure SDRAM Controller */
-+	sdram_init(	AT91C_SDRAMC_NC_9  |
-+				AT91C_SDRAMC_NR_13 |
-+				AT91C_SDRAMC_CAS_2 |
-+				AT91C_SDRAMC_NB_4_BANKS |
-+				AT91C_SDRAMC_DBW_32_BITS |
-+				AT91C_SDRAMC_TWR_2 |
-+				AT91C_SDRAMC_TRC_7 |
-+				AT91C_SDRAMC_TRP_2 |
-+				AT91C_SDRAMC_TRCD_2 |
-+				AT91C_SDRAMC_TRAS_5 |
-+				AT91C_SDRAMC_TXSR_8,		/* Control Register       */
-+				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
-+				AT91C_SDRAMC_MD_SDRAM);		/* SDRAM (no low power)   */ 
-+#endif	/* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+
-+#ifdef CFG_SDRAM
-+//*----------------------------------------------------------------------------
-+//* \fn    sdramc_hw_init
-+//* \brief This function performs SDRAMC HW initialization
-+//*----------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc sdramc_pio[] = {
-+		{"D16", AT91C_PIN_PD(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D17", AT91C_PIN_PD(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D18", AT91C_PIN_PD(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D19", AT91C_PIN_PD(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D20", AT91C_PIN_PD(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D21", AT91C_PIN_PD(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D22", AT91C_PIN_PD(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D23", AT91C_PIN_PD(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D24", AT91C_PIN_PD(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D25", AT91C_PIN_PD(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D26", AT91C_PIN_PD(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D27", AT91C_PIN_PD(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D28", AT91C_PIN_PD(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D29", AT91C_PIN_PD(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D30", AT91C_PIN_PD(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D31", AT91C_PIN_PD(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the SDRAMC PIO controller */
-+	pio_setup(sdramc_pio);
-+}
-+#endif
-+
-+#ifdef CFG_DATAFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_recovery								*/
-+/* \brief This function erases DataFlash Page 0 if USER PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USER PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+		df_page_erase(pDf, 0);
-+#endif
-+}
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_hw_init								*/
-+/* \brief This function performs DataFlash HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc df_pio[] = {
-+		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+		{"NPCS0", AT91C_PIN_PA(5), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nand_recovery								*/
-+/* \brief This function erases NandFlash Block 0 if USER PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+static void nand_recovery(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb_pio[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb_pio);
-+	
-+	/* If USER PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if (!pio_get_value(AT91C_PIN_PB(10)) )
-+		AT91F_NandEraseBlock0();
-+}
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_hw_init							*/
-+/* \brief NandFlash HW init							*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc nand_pio[] = {
-+		{"RDY_BSY", AT91C_PIN_PA(22), 0, PIO_PULLUP, PIO_INPUT},
-+		{"NANDCS",  AT91C_PIN_PD(15), 0, PIO_PULLUP, PIO_OUTPUT},
-+		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBI0CSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBI0CSA);
-+		    
-+	/* Configure SMC CS3 */
-+ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC0 + SMC_SETUP3);
-+  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC0 + SMC_PULSE3);
-+	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC0 + SMC_CYCLE3);
-+	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
-+  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC0 + SMC_CTRL3);
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOA), PMC_PCER + AT91C_BASE_PMC);
-+	writel((1 << AT91C_ID_PIOCDE), PMC_PCER + AT91C_BASE_PMC);
-+
-+	pio_setup(nand_pio);
-+
-+	nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_16bits_dbw_init						*/
-+/* \brief Configure SMC in 16 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+	writel(readl(AT91C_BASE_SMC0 + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_8bits_dbw_init						*/
-+/* \brief Configure SMC in 8 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+	writel((readl(AT91C_BASE_SMC0 + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC0 + SMC_CTRL3);
-+}
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-+
-+
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
--- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
- 
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+	ldr 	r0,=AT91C_PMC_MOR
-+	ldr 	r1, [r0]
-+	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
-+	ands 	r1, r1, r2
-+	bne	_init_data	/* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- 	ldr 	r0,=AT91C_PMC_SR
- 	ldr 	r1, [r0]
-diff --git a/driver/dataflash.c b/driver/dataflash.c
-index e28e49e..4de295a 100644
--- a/driver/dataflash.c
-+++ b/driver/dataflash.c
-@@ -293,14 +293,14 @@ static int df_init (AT91PS_DF pDf)
- 			pDf->dfDescription.pages_size = 264;
- 			pDf->dfDescription.page_offset = 9;
- 			break;
-
-+*/
- 		case AT45DB021B:
- 			pDf->dfDescription.pages_number = 1024;
- 			pDf->dfDescription.pages_size = 264;
- 			pDf->dfDescription.page_offset = 9;
- 			break;
- 
-		case AT45DB041B:
-+/*		case AT45DB041B:
- 			pDf->dfDescription.pages_number = 2048;
- 			pDf->dfDescription.pages_size = 264;
- 			pDf->dfDescription.page_offset = 9;
-@@ -373,7 +373,7 @@ int load_df(unsigned int pcs, unsigned int img_addr, unsigned int img_size, unsi
-     if (!df_init(pDf))
-         return -1;
- 
-#if defined(AT91SAM9260) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
-+#if defined(AT91SAM9260) || defined(AT91SAM9263) || defined(AT91SAM9XE) || defined(AT91SAM9G20)
-     /* Test if a button has been pressed or not */
-     /* Erase Page 0 to avoid infinite loop */
-     df_recovery(pDf);
-diff --git a/include/part.h b/include/part.h
-index ba5985a..a1863d0 100644
--- a/include/part.h
-+++ b/include/part.h
-@@ -61,7 +61,11 @@
- 
- #ifdef AT91SAM9263
- #include "AT91SAM9263_inc.h"
-#include "at91sam9263ek.h"
-+	#ifdef at91sam9263ek
-+	#include "at91sam9263ek.h"
-+	#elif usb_a9263
-+	#include "usb-a9263.h"
-+	#endif
- #endif
- 
- #ifdef AT91CAP9
-- 
-1.5.6.3
-
--- a/bsp/buildroot/board/calao/usb-a9263/linux-3.4.4.config
+++ b/bsp/buildroot/board/calao/usb-a9263/linux-3.4.4.config
@@ -1,102 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9263=y
-CONFIG_MACH_USB_A9263=y
-CONFIG_AT91_SLOW_CLOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_XATTR=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
--- a/bsp/buildroot/board/calao/usb-a9g20-lpw/linux-3.4.4.config
+++ b/bsp/buildroot/board/calao/usb-a9g20-lpw/linux-3.4.4.config
@@ -1,105 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9G20=y
-CONFIG_MACH_USB_A9G20=y
-CONFIG_AT91_SLOW_CLOCK=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_AEABI=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_I2C=y
-CONFIG_I2C_GPIO=y
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_RV3029C2=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_UBIFS_FS_XATTR=y
-CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
--- a/bsp/buildroot/board/calao/usb-a9g20-lpw/patches/at91bootstrap/0001-usb-a9g20-lpw.patch
+++ b/bsp/buildroot/board/calao/usb-a9g20-lpw/patches/at91bootstrap/0001-usb-a9g20-lpw.patch
@@ -1,610 +0,0 @@
-From 8d84757d5170969e8bdfebc7951f43c5aa2b05fd Mon Sep 17 00:00:00 2001
-From: Gregory Hermant <gregory.hermant@calao-systems.com>
-Date: Fri, 6 Jul 2012 16:32:47 +0200
-Subject: [PATCH] Add support for the Calao-systems USB-A9G20-LPW
-
-
-Signed-off-by: Gregory Hermant <gregory.hermant@calao-systems.com>
---
- board/usb_a9g20_lpw/nandflash/Makefile        |  121 ++++++++++
- board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h |  112 +++++++++
- board/usb_a9g20_lpw/usb_a9g20_lpw.c           |  303 +++++++++++++++++++++++++
- crt0_gnu.S                                    |    7 +
- include/part.h                                |    6 +-
- 5 files changed, 548 insertions(+), 1 deletions(-)
- create mode 100644 board/usb_a9g20_lpw/nandflash/Makefile
- create mode 100644 board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
- create mode 100644 board/usb_a9g20_lpw/usb_a9g20_lpw.c
-
-diff --git a/board/usb_a9g20_lpw/nandflash/Makefile b/board/usb_a9g20_lpw/nandflash/Makefile
-new file mode 100644
-index 0000000..8c9d99a
--- /dev/null
-+++ b/board/usb_a9g20_lpw/nandflash/Makefile
-@@ -0,0 +1,121 @@
-+# TODO: set this appropriately for your local toolchain
-+ifndef ERASE_FCT
-+ERASE_FCT=rm -f
-+endif
-+ifndef CROSS_COMPILE
-+CROSS_COMPILE=arm-elf-
-+endif
-+
-+TOOLCHAIN=gcc
-+
-+BOOTSTRAP_PATH=../../..
-+
-+# NandFlashBoot Configuration for USB-A9G20-LPW
-+
-+# Target name (case sensitive!!!)
-+TARGET=AT91SAM9G20
-+# Board name (case sensitive!!!)
-+BOARD=usb_a9g20_lpw
-+# Link Address and Top_of_Memory
-+LINK_ADDR=0x200000
-+TOP_OF_MEMORY=0x301000
-+# Name of current directory
-+PROJECT=nandflash
-+
-+ifndef BOOT_NAME
-+BOOT_NAME=$(PROJECT)_$(BOARD)
-+endif
-+
-+INCL=./$(BOOTSTRAP_PATH)/board/$(BOARD)/$(PROJECT)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+
-+AS=$(CROSS_COMPILE)gcc
-+CC=$(CROSS_COMPILE)gcc
-+LD=$(CROSS_COMPILE)gcc
-+NM= $(CROSS_COMPILE)nm
-+SIZE=$(CROSS_COMPILE)size
-+OBJCOPY=$(CROSS_COMPILE)objcopy
-+OBJDUMP=$(CROSS_COMPILE)objdump
-+CCFLAGS=-g -mcpu=arm926ej-s -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL)
-+ASFLAGS=-g -mcpu=arm926ej-s -c -Os -Wall -D$(TARGET) -D$(BOARD) -I$(INCL) -DTOP_OF_MEM=$(TOP_OF_MEMORY)
-+
-+# Linker flags.
-+#  -Wl,...:     tell GCC to pass this to linker.
-+#    -Map:      create map file
-+#    --cref:    add cross reference to map file
-+LDFLAGS+=-nostartfiles -nostdlib -Wl,-Map=$(BOOT_NAME).map,--cref
-+LDFLAGS+=-T $(BOOTSTRAP_PATH)/elf32-littlearm.lds -Ttext $(LINK_ADDR)
-+OBJS=crt0_gnu.o
-+
-+endif
-+
-+OBJS+=\
-+	$(BOARD).o \
-+	main.o \
-+	gpio.o \
-+	pmc.o \
-+	debug.o \
-+	sdramc.o \
-+	nandflash.o \
-+	_udivsi3.o \
-+	_umodsi3.o \
-+	div0.o \
-+	udiv.o \
-+	string.o
-+
-+rebuild: clean all
-+
-+all: 	$(BOOT_NAME)
-+
-+ifeq ($(TOOLCHAIN), gcc)
-+$(BOOT_NAME): $(OBJS)
-+	$(LD) $(LDFLAGS) -n -o $(BOOT_NAME).elf $(OBJS)
-+	$(OBJCOPY) --strip-debug --strip-unneeded $(BOOT_NAME).elf -O binary $(BOOT_NAME).bin
-+endif
-+
-+
-+$(BOARD).o: $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/board/$(BOARD)/$(BOARD).c -o $(BOARD).o
-+
-+main.o: $(BOOTSTRAP_PATH)/main.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/main.c -o main.o
-+
-+gpio.o: $(BOOTSTRAP_PATH)/driver/gpio.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/gpio.c -o gpio.o
-+
-+pmc.o:  $(BOOTSTRAP_PATH)/driver/pmc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/pmc.c -o pmc.o
-+
-+debug.o: $(BOOTSTRAP_PATH)/driver/debug.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/debug.c -o debug.o
-+
-+sdramc.o:  $(BOOTSTRAP_PATH)/driver/sdramc.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/sdramc.c -o sdramc.o
-+
-+dataflash.o:  $(BOOTSTRAP_PATH)/driver/dataflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/dataflash.c -o dataflash.o
-+
-+nandflash.o:  $(BOOTSTRAP_PATH)/driver/nandflash.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/driver/nandflash.c -o nandflash.o
-+
-+crt0_gnu.o:  $(BOOTSTRAP_PATH)/crt0_gnu.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/crt0_gnu.S -o crt0_gnu.o
-+
-+div0.o:  $(BOOTSTRAP_PATH)/lib/div0.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/div0.c -o div0.o
-+
-+string.o:  $(BOOTSTRAP_PATH)/lib/string.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/string.c -o string.o
-+
-+udiv.o:  $(BOOTSTRAP_PATH)/lib/udiv.c 
-+	$(CC) -c $(CCFLAGS) $(BOOTSTRAP_PATH)/lib/udiv.c -o udiv.o
-+
-+_udivsi3.o:  $(BOOTSTRAP_PATH)/lib/_udivsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_udivsi3.S -o _udivsi3.o
-+
-+_umodsi3.o:  $(BOOTSTRAP_PATH)/lib/_umodsi3.S
-+	$(AS) $(ASFLAGS) $(BOOTSTRAP_PATH)/lib/_umodsi3.S -o _umodsi3.o
-+
-+clean:
-+	$(ERASE_FCT) *.o *.bin *.elf *.map
-diff --git a/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h b/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
-new file mode 100644
-index 0000000..c0bdc6e
--- /dev/null
-+++ b/board/usb_a9g20_lpw/nandflash/usb-a9g20-lpw.h
-@@ -0,0 +1,112 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb-a9g20-lpw.h
-+ * Object              :
-+ * Creation            : GH July 6th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#ifndef _USB_A9G20_LPW_H
-+#define _USB_A9G20_LPW_H
-+
-+/* ******************************************************************* */
-+/* PMC Settings                                                        */
-+/*                                                                     */
-+/* The main oscillator is enabled as soon as possible in the c_startup */
-+/* and MCK is switched on the main oscillator.                         */
-+/* PLL initialization is done later in the hw_init() function          */
-+/* ******************************************************************* */
-+#define MASTER_CLOCK		(133000000)
-+#define PLL_LOCK_TIMEOUT	1000000
-+
-+/* Set PLLA to 798Mhz */
-+#define PLLA_SETTINGS	0x20843F02
-+#define PLLB_SETTINGS	0x100F3F02
-+
-+/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
-+#define MCKR_SETTINGS		0x1300
-+#define MCKR_CSS_SETTINGS	(AT91C_PMC_CSS_PLLA_CLK | MCKR_SETTINGS)
-+
-+/* ******************************************************************* */
-+/* NandFlash Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define AT91C_SMARTMEDIA_BASE	0x40000000
-+
-+#define AT91_SMART_MEDIA_ALE    (1 << 21)	/* our ALE is AD21 */
-+#define AT91_SMART_MEDIA_CLE    (1 << 22)	/* our CLE is AD22 */
-+
-+#define NAND_DISABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_SODR = AT91C_PIO_PC14;} while(0)
-+#define NAND_ENABLE_CE() do { *(volatile unsigned int *)AT91C_PIOC_CODR = AT91C_PIO_PC14;} while(0)
-+
-+#define NAND_WAIT_READY() while (!(*(volatile unsigned int *)AT91C_PIOC_PDSR & AT91C_PIO_PC13))
-+
-+
-+/* ******************************************************************** */
-+/* SMC Chip Select 3 Timings for NandFlash for MASTER_CLOCK = 133000000.*/
-+/* Please refer to SMC section in AT91SAM9 datasheet to learn how 	*/
-+/* to generate these values. 						*/
-+/* ******************************************************************** */
-+#define AT91C_SM_NWE_SETUP	(2 << 0)
-+#define AT91C_SM_NCS_WR_SETUP	(0 << 8)
-+#define AT91C_SM_NRD_SETUP	(2 << 16)
-+#define AT91C_SM_NCS_RD_SETUP	(0 << 24)
-+  
-+#define AT91C_SM_NWE_PULSE 	(4 << 0)
-+#define AT91C_SM_NCS_WR_PULSE	(4 << 8)
-+#define AT91C_SM_NRD_PULSE	(4 << 16)
-+#define AT91C_SM_NCS_RD_PULSE	(4 << 24)
-+  
-+#define AT91C_SM_NWE_CYCLE 	(7 << 0)
-+#define AT91C_SM_NRD_CYCLE	(7 << 16)
-+
-+#define AT91C_SM_TDF	        (3 << 16)
-+
-+/* ******************************************************************* */
-+/* BootStrap Settings                                                  */
-+/*                                                                     */
-+/* ******************************************************************* */
-+#define IMG_ADDRESS 		0x20000			/* Image Address in NandFlash */
-+#define	IMG_SIZE		0x40000			/* Image Size in NandFlash */
-+
-+#define MACH_TYPE		0x731			/* USB-A9G20 */
-+#define JUMP_ADDR		0x23F00000		/* Final Jump Address */
-+
-+/* ******************************************************************* */
-+/* Application Settings                                                */
-+/* ******************************************************************* */
-+#undef CFG_DEBUG
-+#undef CFG_DATAFLASH
-+
-+#define CFG_NANDFLASH
-+#undef	NANDFLASH_SMALL_BLOCKS	/* NANDFLASH_LARGE_BLOCKS used instead */
-+#undef  CFG_NANDFLASH_RECOVERY
-+
-+#define	CFG_SDRAM
-+#define	CFG_HW_INIT
-+
-+#endif	/* _USB_A9G20_LPW_H */
-diff --git a/board/usb_a9g20_lpw/usb_a9g20_lpw.c b/board/usb_a9g20_lpw/usb_a9g20_lpw.c
-new file mode 100644
-index 0000000..c372307
--- /dev/null
-+++ b/board/usb_a9g20_lpw/usb_a9g20_lpw.c
-@@ -0,0 +1,303 @@
-+/* ----------------------------------------------------------------------------
-+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+ * ----------------------------------------------------------------------------
-+ * Copyright (c) 2008, Atmel Corporation
-+
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *
-+ * - Redistributions of source code must retain the above copyright notice,
-+ * this list of conditions and the disclaimer below.
-+ *
-+ * Atmel's name may not be used to endorse or promote products derived from
-+ * this software without specific prior written permission.
-+ *
-+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
-+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
-+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
-+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ * ----------------------------------------------------------------------------
-+ * File Name           : usb_a9g20_lpw.c
-+ * Object              :
-+ * Creation            : GH July 6th 2012
-+ *-----------------------------------------------------------------------------
-+ */
-+#include "../../include/part.h"
-+#include "../../include/gpio.h"
-+#include "../../include/pmc.h"
-+#include "../../include/debug.h"
-+#include "../../include/sdramc.h"
-+#include "../../include/main.h"
-+#ifdef CFG_NANDFLASH
-+#include "../../include/nandflash.h"
-+#endif
-+#ifdef CFG_DATAFLASH
-+#include "../../include/dataflash.h"
-+#endif
-+
-+static inline unsigned int get_cp15(void)
-+{
-+	unsigned int value;
-+	__asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (value));
-+	return value;
-+}
-+
-+static inline void set_cp15(unsigned int value)
-+{
-+	__asm__("mcr p15, 0, %0, c1, c0, 0" : : "r" (value));
-+}
-+
-+#ifdef CFG_HW_INIT
-+/*----------------------------------------------------------------------------*/
-+/* \fn    hw_init							      */
-+/* \brief This function performs very low level HW initialization	      */
-+/* This function is invoked as soon as possible during the c_startup	      */
-+/* The bss segment must be initialized					      */
-+/*----------------------------------------------------------------------------*/
-+void hw_init(void)
-+{
-+	unsigned int cp15;
-+	
-+	/* Configure PIOs */
-+	const struct pio_desc hw_pio[] = {
-+#ifdef CFG_DEBUG
-+		{"RXD", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"TXD", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Disable watchdog */
-+	writel(AT91C_WDTC_WDDIS, AT91C_BASE_WDTC + WDTC_WDMR);
-+
-+	/* At this stage the main oscillator is supposed to be enabled
-+	 * PCK = MCK = MOSC */
-+	writel(0x00, AT91C_BASE_PMC + PMC_PLLICPR);
-+
-+	/* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
-+	pmc_cfg_plla(PLLA_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* PCK = PLLA/2 = 3 * MCK */
-+	pmc_cfg_mck(MCKR_SETTINGS, PLL_LOCK_TIMEOUT);
-+	/* Switch MCK on PLLA output */
-+	pmc_cfg_mck(MCKR_CSS_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure PLLB */
-+	pmc_cfg_pllb(PLLB_SETTINGS, PLL_LOCK_TIMEOUT);
-+
-+	/* Configure CP15 */
-+	cp15 = get_cp15();
-+	cp15 |= I_CACHE;
-+	set_cp15(cp15);
-+
-+	/* Configure the PIO controller */
-+	pio_setup(hw_pio);
-+
-+	/* Configure the EBI Slave Slot Cycle to 64 */
-+	writel((readl((AT91C_BASE_MATRIX + MATRIX_SCFG3)) & ~0xFF) | 0x40, (AT91C_BASE_MATRIX + MATRIX_SCFG3));
-+
-+#ifdef CFG_DEBUG
-+	/* Enable Debug messages on the DBGU */
-+	dbg_init(BAUDRATE(MASTER_CLOCK, 115200));
-+
-+	dbg_print("Start AT91Bootstrap...\n\r");
-+#endif /* CFG_DEBUG */
-+
-+#ifdef CFG_SDRAM
-+	/* Initialize the matrix (VDDIOSEL=0: memory voltage = 1.8V ) */
-+	writel((readl(AT91C_BASE_CCFG + CCFG_EBICSA) & ~0x00010000) | AT91C_EBI_CS1A_SDRAMC , AT91C_BASE_CCFG + CCFG_EBICSA);
-+
-+	/* Configure SDRAM Controller */
-+	sdram_init(	AT91C_SDRAMC_NC_9  |
-+				AT91C_SDRAMC_NR_13 |
-+				AT91C_SDRAMC_CAS_3 |
-+				AT91C_SDRAMC_NB_4_BANKS |
-+				AT91C_SDRAMC_DBW_32_BITS |
-+				AT91C_SDRAMC_TWR_3 |
-+				AT91C_SDRAMC_TRC_9 |
-+				AT91C_SDRAMC_TRP_3 |
-+				AT91C_SDRAMC_TRCD_3 |
-+				AT91C_SDRAMC_TRAS_6 |
-+				AT91C_SDRAMC_TXSR_10,		/* Control Register */
-+				(MASTER_CLOCK * 7)/1000000,	/* Refresh Timer Register */
-+                                AT91C_SDRAMC_MD_SDRAM);         /* SDRAM (no low power)   */
-+
-+#endif /* CFG_SDRAM */
-+}
-+#endif /* CFG_HW_INIT */
-+
-+#ifdef CFG_SDRAM
-+/*------------------------------------------------------------------------------*/
-+/* \fn    sdramc_hw_init							*/
-+/* \brief This function performs SDRAMC HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void sdramc_hw_init(void)
-+{
-+	/* Configure PIOs */
-+/*	const struct pio_desc sdramc_pio[] = {
-+		{"D16", AT91C_PIN_PC(16), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D17", AT91C_PIN_PC(17), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D18", AT91C_PIN_PC(18), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D19", AT91C_PIN_PC(19), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D20", AT91C_PIN_PC(20), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D21", AT91C_PIN_PC(21), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D22", AT91C_PIN_PC(22), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D23", AT91C_PIN_PC(23), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D24", AT91C_PIN_PC(24), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D25", AT91C_PIN_PC(25), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D26", AT91C_PIN_PC(26), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D27", AT91C_PIN_PC(27), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D28", AT91C_PIN_PC(28), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D29", AT91C_PIN_PC(29), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D30", AT91C_PIN_PC(30), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"D31", AT91C_PIN_PC(31), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+*/
-+	/* Configure the SDRAMC PIO controller to output PCK0 */
-+/*	pio_setup(sdramc_pio); */
-+
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_ASR(0));
-+	writel(0xFFFF0000, AT91C_BASE_PIOC + PIO_PDR(0));
-+
-+}
-+#endif /* CFG_SDRAM */
-+
-+#ifdef CFG_DATAFLASH
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_recovery								*/
-+/* \brief This function erases DataFlash Page 0 if USR PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+void df_recovery(AT91PS_DF pDf)
-+{
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb);
-+	
-+	/* If USR PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if ( !pio_get_value(AT91C_PIN_PB(10)) )
-+		df_page_erase(pDf, 0);
-+#endif
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    df_hw_init								*/
-+/* \brief This function performs DataFlash HW initialization			*/
-+/*------------------------------------------------------------------------------*/
-+void df_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc df_pio[] = {
-+		{"MISO",  AT91C_PIN_PA(0), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"MOSI",  AT91C_PIN_PA(1), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+		{"SPCK",  AT91C_PIN_PA(2), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS0_DATAFLASH)
-+		{"NPCS0", AT91C_PIN_PA(3), 0, PIO_DEFAULT, PIO_PERIPH_A},
-+#endif
-+#if (AT91C_SPI_PCS_DATAFLASH == AT91C_SPI_PCS1_DATAFLASH)
-+		{"NPCS1", AT91C_PIN_PC(11), 0, PIO_DEFAULT, PIO_PERIPH_B},
-+#endif
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	pio_setup(df_pio);
-+}
-+#endif /* CFG_DATAFLASH */
-+
-+
-+
-+#ifdef CFG_NANDFLASH
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nand_recovery						*/
-+/* \brief This function erases NandFlash Block 0 if USER PB is pressed 		*/
-+/*        during boot sequence							*/
-+/*------------------------------------------------------------------------------*/
-+#ifdef CFG_NANDFLASH_RECOVERY
-+static void nand_recovery(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc usrpb[] = {
-+		{"USRPB", AT91C_PIN_PB(10), 0, PIO_PULLUP, PIO_INPUT},
-+		{(char *) 0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOB), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(usrpb);
-+	
-+	/* If USER PB is pressed during Boot sequence */
-+	/* Erase NandFlash block 0*/
-+	if (!pio_get_value(AT91C_PIN_PB(10)) )
-+		AT91F_NandEraseBlock0();
-+}
-+#else
-+static void nand_recovery(void) {}
-+#endif
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_hw_init							*/
-+/* \brief NandFlash HW init							*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_hw_init(void)
-+{
-+	/* Configure PIOs */
-+	const struct pio_desc nand_pio[] = {
-+		{"RDY_BSY", AT91C_PIN_PC(13), 0, PIO_PULLUP, PIO_INPUT},
-+		{"NANDCS",  AT91C_PIN_PC(14), 0, PIO_PULLUP, PIO_OUTPUT},
-+		{(char *) 0, 0, 0,  PIO_DEFAULT, PIO_PERIPH_A},
-+	};
-+
-+	/* Setup Smart Media, first enable the address range of CS3 in HMATRIX user interface */
-+	writel(readl(AT91C_BASE_CCFG + CCFG_EBICSA) | AT91C_EBI_CS3A_SM, AT91C_BASE_CCFG + CCFG_EBICSA);
-+		    
-+	/* Configure SMC CS3 */
-+ 	writel((AT91C_SM_NWE_SETUP | AT91C_SM_NCS_WR_SETUP | AT91C_SM_NRD_SETUP | AT91C_SM_NCS_RD_SETUP), AT91C_BASE_SMC + SMC_SETUP3);
-+  	writel((AT91C_SM_NWE_PULSE | AT91C_SM_NCS_WR_PULSE | AT91C_SM_NRD_PULSE | AT91C_SM_NCS_RD_PULSE), AT91C_BASE_SMC + SMC_PULSE3);
-+	writel((AT91C_SM_NWE_CYCLE | AT91C_SM_NRD_CYCLE)						, AT91C_BASE_SMC + SMC_CYCLE3);
-+	writel((AT91C_SMC_READMODE | AT91C_SMC_WRITEMODE | AT91C_SMC_NWAITM_NWAIT_DISABLE | 
-+  		AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS | AT91C_SM_TDF)						, AT91C_BASE_SMC + SMC_CTRL3);
-+
-+	/* Configure the PIO controller */
-+	writel((1 << AT91C_ID_PIOC), PMC_PCER + AT91C_BASE_PMC);
-+	pio_setup(nand_pio);
-+	
-+	nand_recovery();
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_16bits_dbw_init						*/
-+/* \brief Configure SMC in 16 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_16bits_dbw_init(void)
-+{
-+	writel(readl(AT91C_BASE_SMC + SMC_CTRL3) | AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+/*------------------------------------------------------------------------------*/
-+/* \fn    nandflash_cfg_8bits_dbw_init						*/
-+/* \brief Configure SMC in 8 bits mode						*/
-+/*------------------------------------------------------------------------------*/
-+void nandflash_cfg_8bits_dbw_init(void)
-+{
-+	writel((readl(AT91C_BASE_SMC + SMC_CTRL3) & ~(AT91C_SMC_DBW)) | AT91C_SMC_DBW_WIDTH_EIGTH_BITS, AT91C_BASE_SMC + SMC_CTRL3);
-+}
-+
-+#endif /* #ifdef CFG_NANDFLASH */
-diff --git a/crt0_gnu.S b/crt0_gnu.S
-index 042b617..002feef 100644
--- a/crt0_gnu.S
-+++ b/crt0_gnu.S
-@@ -106,6 +106,13 @@ _relocate_to_sram:
- #endif /* CFG_NORFLASH */
- 
- _setup_clocks:
-+/* Test if main osc is bypassed */
-+	ldr 	r0,=AT91C_PMC_MOR
-+	ldr 	r1, [r0]
-+	ldr 	r2,=AT91C_CKGR_OSCBYPASS 
-+	ands 	r1, r1, r2
-+	bne	_init_data	/* branch if OSCBYPASS=1 */
-+
- /* Test if main oscillator is enabled */
- 	ldr 	r0,=AT91C_PMC_SR
- 	ldr 	r1, [r0]
-diff --git a/include/part.h b/include/part.h
-index ba5985a..1d7392a 100644
--- a/include/part.h
-+++ b/include/part.h
-@@ -46,7 +46,11 @@
- 
- #ifdef AT91SAM9G20
- #include "AT91SAM9260_inc.h"
-#include "at91sam9g20ek.h"
-+	#ifdef at91sam9g20ek
-+	#include "at91sam9g20ek.h"
-+	#elif usb_a9g20_lpw
-+	#include "usb-a9g20-lpw.h"
-+	#endif
- #endif
- 
- #ifdef AT91SAM9261
-- 
-1.5.6.3
-
--- a/bsp/buildroot/board/calao/usb-a9g20-lpw/patches/barebox/0001-usb-a9g20-lpw.patch
+++ b/bsp/buildroot/board/calao/usb-a9g20-lpw/patches/barebox/0001-usb-a9g20-lpw.patch
@@ -1,12 +0,0 @@
-diff --git a/arch/arm/configs/usb_a9g20_defconfig b/arch/arm/configs/usb_a9g20_defconfig
-index 30bf380..7716e0e 100644
--- a/arch/arm/configs/usb_a9g20_defconfig
-+++ b/arch/arm/configs/usb_a9g20_defconfig
-@@ -15,6 +15,7 @@ CONFIG_HUSH_FANCY_PROMPT=y
- CONFIG_CMDLINE_EDITING=y
- CONFIG_AUTO_COMPLETE=y
- CONFIG_MENU=y
-+# CONFIG_ERRNO_MESSAGES is not set
- # CONFIG_CONSOLE_ACTIVATE_FIRST is not set
- CONFIG_CONSOLE_ACTIVATE_ALL=y
- CONFIG_PARTITION=y
--- a/bsp/buildroot/board/congatec/qmx6/readme.txt
+++ b/bsp/buildroot/board/congatec/qmx6/readme.txt
@@ -1,36 +0,0 @@
-This is the minimal buildroot support for the Congatec QMX6 Qseven CoM
-
-conga-QMX6 is based on the freescale iMX6 SoC. For more information please
-have a look at http://www.congatec.com/products/qseven/conga-qmx6.html
-
-The configuration is based on the currently latest kernel release from
-Congatec's git repository which is based on 3.0.35. The bootloader u-boot
-is preconfigured on the CPU module and does not need to be replaced.
-
-To build the default configuration you only have to:
-
-	make qmx6_defconfig && make
-
-You will need a microSD card of sufficient size and the first or only
-partition configured as Linux type.
-
-To transfer the system to the card do:
-
-	$ sudo dd if=output/images/rootfs.ext2 of=/dev/sdX1
-
-You can optionally extend the filesystem size to the whole partition:
-
-	$ sudo resize2fs /dev/sdX1
-
-You can also update the card image without completely rewriting it:
-
-	$ sudo mount /dev/sdX1 /mnt
-	$ sudo tar xf output/images/rootfs.tar -C /mnt
-	$ sudo umount /mnt
-
-Connect a terminal program to the rs232 connector marked "CONSOLE"
-with baudrate set to 115200, insert the microSD card into the socket
-on the CPU module and power the board to watch the system boot.
-
-Booting from the SD card slot on the base board is currently not
-supported.
--- a/bsp/buildroot/board/cubietech/cubieboard/boot.cmd
+++ b/bsp/buildroot/board/cubietech/cubieboard/boot.cmd
@@ -1,4 +0,0 @@
-setenv bootargs console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait panic=10 ${extra}
-fatload mmc 0 0x43000000 script.bin
-fatload mmc 0 0x48000000 uImage
-bootm 0x48000000
--- a/bsp/buildroot/board/cubietech/cubieboard/linux-cubieboard2.config
+++ b/bsp/buildroot/board/cubietech/cubieboard/linux-cubieboard2.config
@@ -1,749 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
-CONFIG_AUDIT=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
-CONFIG_RCU_FAST_NO_HZ=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=19
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_DEVICE=y
-CONFIG_CPUSETS=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_MEM_RES_CTLR=y
-CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
-CONFIG_CGROUP_MEM_RES_CTLR_KMEM=y
-CONFIG_CGROUP_PERF=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_CFS_BANDWIDTH=y
-CONFIG_RT_GROUP_SCHED=y
-CONFIG_BLK_CGROUP=y
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_PERF_COUNTERS=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_JUMP_LABEL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_BLK_DEV_BSGLIB=y
-CONFIG_BLK_DEV_INTEGRITY=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_OSF_PARTITION=y
-CONFIG_AMIGA_PARTITION=y
-CONFIG_MAC_PARTITION=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_MINIX_SUBPARTITION=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_UNIXWARE_DISKLABEL=y
-CONFIG_SGI_PARTITION=y
-CONFIG_SUN_PARTITION=y
-CONFIG_KARMA_PARTITION=y
-CONFIG_EFI_PARTITION=y
-CONFIG_CFQ_GROUP_IOSCHED=y
-CONFIG_ARCH_SUN7I=y
-CONFIG_SUNXI_SCALING_MIN=408
-# CONFIG_CACHE_L2X0 is not set
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_SMP=y
-CONFIG_ARM_ARCH_TIMER=y
-CONFIG_NR_CPUS=2
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_HIGHMEM=y
-CONFIG_COMPACTION=y
-CONFIG_KSM=y
-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/mmc0p1 rw init=/init loglevel=8"
-CONFIG_KEXEC=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT=m
-CONFIG_CPU_FREQ_DEFAULT_GOV_FANTASY=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=m
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
-CONFIG_CPU_FREQ_USR_EVNT_NOTIFY=y
-CONFIG_CPU_FREQ_DVFS=y
-CONFIG_CPU_IDLE=y
-CONFIG_VFP=y
-CONFIG_NEON=y
-CONFIG_BINFMT_MISC=y
-CONFIG_PM_RUNTIME=y
-CONFIG_PM_DEBUG=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_FIB_TRIE_STATS=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_NET_IPIP=y
-CONFIG_NET_IPGRE_DEMUX=m
-CONFIG_NET_IPGRE=m
-CONFIG_NET_IPGRE_BROADCAST=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-CONFIG_ARPD=y
-CONFIG_SYN_COOKIES=y
-CONFIG_INET_AH=y
-CONFIG_INET_ESP=y
-CONFIG_INET_IPCOMP=y
-CONFIG_INET_DIAG=m
-CONFIG_INET_UDP_DIAG=m
-CONFIG_TCP_CONG_ADVANCED=y
-CONFIG_TCP_CONG_BIC=y
-CONFIG_TCP_CONG_WESTWOOD=y
-CONFIG_TCP_CONG_HTCP=y
-CONFIG_TCP_CONG_HSTCP=y
-CONFIG_TCP_CONG_HYBLA=y
-CONFIG_TCP_CONG_SCALABLE=y
-CONFIG_TCP_CONG_LP=y
-CONFIG_TCP_CONG_VENO=y
-CONFIG_TCP_CONG_YEAH=y
-CONFIG_TCP_CONG_ILLINOIS=y
-CONFIG_TCP_MD5SIG=y
-CONFIG_IPV6=y
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_IPV6_OPTIMISTIC_DAD=y
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_MIP6=m
-CONFIG_INET6_XFRM_MODE_TRANSPORT=m
-CONFIG_INET6_XFRM_MODE_TUNNEL=m
-CONFIG_INET6_XFRM_MODE_BEET=m
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_IPV6_SIT=m
-CONFIG_IPV6_SIT_6RD=y
-CONFIG_IPV6_TUNNEL=m
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_IPV6_SUBTREES=y
-CONFIG_IPV6_MROUTE=y
-CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
-CONFIG_IPV6_PIMSM_V2=y
-# CONFIG_ANDROID_PARANOID_NETWORK is not set
-CONFIG_NETWORK_SECMARK=y
-CONFIG_NETWORK_PHY_TIMESTAMPING=y
-CONFIG_NETFILTER=y
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CONNTRACK_SECMARK=y
-CONFIG_NF_CONNTRACK_ZONES=y
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CONNTRACK_TIMEOUT=y
-CONFIG_NF_CONNTRACK_TIMESTAMP=y
-CONFIG_NF_CT_PROTO_DCCP=m
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CT_PROTO_UDPLITE=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-CONFIG_NF_CONNTRACK_NETBIOS_NS=m
-CONFIG_NF_CONNTRACK_SNMP=m
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SANE=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NF_CT_NETLINK_TIMEOUT=m
-CONFIG_NETFILTER_TPROXY=m
-CONFIG_NETFILTER_XT_SET=m
-CONFIG_NETFILTER_XT_TARGET_AUDIT=m
-CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
-CONFIG_NETFILTER_XT_TARGET_CT=m
-CONFIG_NETFILTER_XT_TARGET_DSCP=m
-CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
-CONFIG_NETFILTER_XT_TARGET_LED=m
-CONFIG_NETFILTER_XT_TARGET_LOG=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
-CONFIG_NETFILTER_XT_TARGET_TEE=m
-CONFIG_NETFILTER_XT_TARGET_TPROXY=m
-CONFIG_NETFILTER_XT_TARGET_TRACE=m
-CONFIG_NETFILTER_XT_TARGET_SECMARK=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
-CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
-CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_CPU=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
-CONFIG_NETFILTER_XT_MATCH_IPVS=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_NFACCT=m
-CONFIG_NETFILTER_XT_MATCH_OSF=m
-CONFIG_NETFILTER_XT_MATCH_OWNER=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA2=m
-CONFIG_NETFILTER_XT_MATCH_RATEEST=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_RECENT=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_SOCKET=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_TIME=m
-CONFIG_NETFILTER_XT_MATCH_U32=m
-CONFIG_IP_SET=m
-CONFIG_IP_SET_BITMAP_IP=m
-CONFIG_IP_SET_BITMAP_IPMAC=m
-CONFIG_IP_SET_BITMAP_PORT=m
-CONFIG_IP_SET_HASH_IP=m
-CONFIG_IP_SET_HASH_IPPORT=m
-CONFIG_IP_SET_HASH_IPPORTIP=m
-CONFIG_IP_SET_HASH_IPPORTNET=m
-CONFIG_IP_SET_HASH_NET=m
-CONFIG_IP_SET_HASH_NETPORT=m
-CONFIG_IP_SET_HASH_NETIFACE=m
-CONFIG_IP_SET_LIST_SET=m
-CONFIG_IP_VS=m
-CONFIG_IP_VS_IPV6=y
-CONFIG_IP_VS_PROTO_TCP=y
-CONFIG_IP_VS_PROTO_UDP=y
-CONFIG_IP_VS_PROTO_ESP=y
-CONFIG_IP_VS_PROTO_AH=y
-CONFIG_IP_VS_PROTO_SCTP=y
-CONFIG_IP_VS_RR=m
-CONFIG_IP_VS_WRR=m
-CONFIG_IP_VS_LC=m
-CONFIG_IP_VS_WLC=m
-CONFIG_IP_VS_LBLC=m
-CONFIG_IP_VS_LBLCR=m
-CONFIG_IP_VS_DH=m
-CONFIG_IP_VS_SH=m
-CONFIG_IP_VS_SED=m
-CONFIG_IP_VS_NQ=m
-CONFIG_IP_VS_FTP=m
-CONFIG_IP_VS_PE_SIP=m
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_RPFILTER=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_REJECT_SKERR=y
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_QUEUE=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_AH=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_MH=m
-CONFIG_IP6_NF_MATCH_RPFILTER=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_TARGET_REJECT_SKERR=y
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_BRIDGE_NF_EBTABLES=m
-CONFIG_BRIDGE_EBT_BROUTE=m
-CONFIG_BRIDGE_EBT_T_FILTER=m
-CONFIG_BRIDGE_EBT_T_NAT=m
-CONFIG_BRIDGE_EBT_802_3=m
-CONFIG_BRIDGE_EBT_AMONG=m
-CONFIG_BRIDGE_EBT_ARP=m
-CONFIG_BRIDGE_EBT_IP=m
-CONFIG_BRIDGE_EBT_IP6=m
-CONFIG_BRIDGE_EBT_LIMIT=m
-CONFIG_BRIDGE_EBT_MARK=m
-CONFIG_BRIDGE_EBT_PKTTYPE=m
-CONFIG_BRIDGE_EBT_STP=m
-CONFIG_BRIDGE_EBT_VLAN=m
-CONFIG_BRIDGE_EBT_ARPREPLY=m
-CONFIG_BRIDGE_EBT_DNAT=m
-CONFIG_BRIDGE_EBT_MARK_T=m
-CONFIG_BRIDGE_EBT_REDIRECT=m
-CONFIG_BRIDGE_EBT_SNAT=m
-CONFIG_BRIDGE_EBT_LOG=m
-CONFIG_BRIDGE_EBT_ULOG=m
-CONFIG_BRIDGE_EBT_NFLOG=m
-CONFIG_L2TP=m
-CONFIG_L2TP_V3=y
-CONFIG_L2TP_IP=m
-CONFIG_L2TP_ETH=m
-CONFIG_BRIDGE=m
-CONFIG_VLAN_8021Q=m
-CONFIG_VLAN_8021Q_GVRP=y
-CONFIG_BATMAN_ADV=m
-CONFIG_OPENVSWITCH=m
-CONFIG_NETPRIO_CGROUP=m
-CONFIG_NET_PKTGEN=m
-CONFIG_IRDA=m
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-CONFIG_IRDA_ULTRA=y
-CONFIG_IRTTY_SIR=m
-CONFIG_KINGSUN_DONGLE=m
-CONFIG_KSDAZZLE_DONGLE=m
-CONFIG_KS959_DONGLE=m
-CONFIG_USB_IRDA=m
-CONFIG_SIGMATEL_FIR=m
-CONFIG_MCS_FIR=m
-CONFIG_BT=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
-CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIBTSDIO=m
-CONFIG_BT_HCIBCM203X=m
-CONFIG_BT_HCIBPA10X=m
-CONFIG_BT_HCIBFUSB=m
-CONFIG_BT_MRVL=m
-CONFIG_BT_MRVL_SDIO=m
-CONFIG_BT_ATH3K=m
-CONFIG_AF_RXRPC=m
-CONFIG_RXKAD=m
-CONFIG_CFG80211=y
-CONFIG_CFG80211_DEVELOPER_WARNINGS=y
-CONFIG_WIRELESS_EXT_SYSFS=y
-CONFIG_LIB80211=m
-CONFIG_CFG80211_ALLOW_RECONNECT=y
-CONFIG_MAC80211=m
-CONFIG_MAC80211_MESH=y
-CONFIG_WIMAX=m
-CONFIG_RFKILL=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_CONNECTOR=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_CRYPTOLOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_SUNXI_DBGREG=m
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_ATA=y
-CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_SW_SATA_AHCI_PLATFORM=y
-CONFIG_NETDEVICES=y
-CONFIG_BONDING=m
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_FARADAY is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-CONFIG_SUNXI_EMAC=y
-CONFIG_PHYLIB=y
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_MPPE=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPPOE=m
-CONFIG_PPPOLAC=m
-CONFIG_PPPOPNS=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_USB_IPHETH=m
-CONFIG_ATH_COMMON=m
-CONFIG_ATH9K=m
-CONFIG_RTL8192CU=m
-CONFIG_RTL8192CU_SW=m
-CONFIG_RTL8188EU=m
-CONFIG_RTXX7X_SW=m
-CONFIG_INPUT_POLLDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_KEYRESET=y
-CONFIG_KEYBOARD_HV2605_KEYBOARD=m
-CONFIG_INPUT_JOYSTICK=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_GT801=m
-CONFIG_TOUCHSCREEN_GT811=m
-CONFIG_TOUCHSCREEN_GT818=m
-CONFIG_TOUCHSCREEN_FT5X_TS=m
-CONFIG_TOUCHSCREEN_ZT8031=m
-CONFIG_GSENSOR=y
-CONFIG_SENSORS_BMA250=m
-CONFIG_MEMSIC_ECOMPASS=m
-CONFIG_SENSORS_MXC622X=m
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=8
-CONFIG_SERIAL_8250_RUNTIME_UARTS=8
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_SPI=y
-CONFIG_SPI_DEBUG=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_SUNXI=m
-CONFIG_POWER_SUPPLY=y
-CONFIG_AW_AXP=y
-# CONFIG_HWMON is not set
-CONFIG_REGULATOR=y
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_VIDEO_DEV=y
-CONFIG_MEDIA_TUNER_CUSTOMISE=y
-# CONFIG_MEDIA_TUNER_SIMPLE is not set
-# CONFIG_MEDIA_TUNER_TDA8290 is not set
-# CONFIG_MEDIA_TUNER_TDA827X is not set
-# CONFIG_MEDIA_TUNER_TDA18271 is not set
-# CONFIG_MEDIA_TUNER_TDA9887 is not set
-# CONFIG_MEDIA_TUNER_TEA5767 is not set
-# CONFIG_MEDIA_TUNER_MT20XX is not set
-# CONFIG_MEDIA_TUNER_MT2060 is not set
-# CONFIG_MEDIA_TUNER_MT2266 is not set
-# CONFIG_MEDIA_TUNER_MT2131 is not set
-# CONFIG_MEDIA_TUNER_QT1010 is not set
-# CONFIG_MEDIA_TUNER_MXL5005S is not set
-# CONFIG_MEDIA_TUNER_MXL5007T is not set
-# CONFIG_MEDIA_TUNER_MC44S803 is not set
-# CONFIG_MEDIA_TUNER_MAX2165 is not set
-# CONFIG_MEDIA_TUNER_TDA18218 is not set
-# CONFIG_MEDIA_TUNER_TDA18212 is not set
-CONFIG_USB_VIDEO_CLASS=m
-CONFIG_USB_M5602=m
-CONFIG_USB_STV06XX=m
-CONFIG_USB_GL860=m
-CONFIG_USB_GSPCA_BENQ=m
-CONFIG_USB_GSPCA_CONEX=m
-CONFIG_USB_GSPCA_CPIA1=m
-CONFIG_USB_GSPCA_ETOMS=m
-CONFIG_USB_GSPCA_FINEPIX=m
-CONFIG_USB_GSPCA_JEILINJ=m
-CONFIG_USB_GSPCA_JL2005BCD=m
-CONFIG_USB_GSPCA_KINECT=m
-CONFIG_USB_GSPCA_KONICA=m
-CONFIG_USB_GSPCA_MARS=m
-CONFIG_USB_GSPCA_MR97310A=m
-CONFIG_USB_GSPCA_NW80X=m
-CONFIG_USB_GSPCA_OV519=m
-CONFIG_USB_GSPCA_OV534=m
-CONFIG_USB_GSPCA_OV534_9=m
-CONFIG_USB_GSPCA_PAC207=m
-CONFIG_USB_GSPCA_PAC7302=m
-CONFIG_USB_GSPCA_PAC7311=m
-CONFIG_USB_GSPCA_SE401=m
-CONFIG_USB_GSPCA_SN9C2028=m
-CONFIG_USB_GSPCA_SN9C20X=m
-CONFIG_USB_GSPCA_SONIXB=m
-CONFIG_USB_GSPCA_SONIXJ=m
-CONFIG_USB_GSPCA_SPCA500=m
-CONFIG_USB_GSPCA_SPCA501=m
-CONFIG_USB_GSPCA_SPCA505=m
-CONFIG_USB_GSPCA_SPCA506=m
-CONFIG_USB_GSPCA_SPCA508=m
-CONFIG_USB_GSPCA_SPCA561=m
-CONFIG_USB_GSPCA_SPCA1528=m
-CONFIG_USB_GSPCA_SQ905=m
-CONFIG_USB_GSPCA_SQ905C=m
-CONFIG_USB_GSPCA_SQ930X=m
-CONFIG_USB_GSPCA_STK014=m
-CONFIG_USB_GSPCA_STV0680=m
-CONFIG_USB_GSPCA_SUNPLUS=m
-CONFIG_USB_GSPCA_T613=m
-CONFIG_USB_GSPCA_TOPRO=m
-CONFIG_USB_GSPCA_TV8532=m
-CONFIG_USB_GSPCA_VC032X=m
-CONFIG_USB_GSPCA_VICAM=m
-CONFIG_USB_GSPCA_XIRLINK_CIT=m
-CONFIG_USB_GSPCA_ZC3XX=m
-CONFIG_VIDEO_PVRUSB2=m
-CONFIG_VIDEO_HDPVR=m
-CONFIG_VIDEO_EM28XX=m
-CONFIG_VIDEO_EM28XX_ALSA=m
-CONFIG_VIDEO_CX231XX=m
-CONFIG_VIDEO_CX231XX_ALSA=m
-CONFIG_VIDEO_TM6000=m
-CONFIG_VIDEO_TM6000_ALSA=m
-CONFIG_VIDEO_USBVISION=m
-CONFIG_USB_ET61X251=m
-CONFIG_USB_SN9C102=m
-CONFIG_USB_PWC=m
-CONFIG_VIDEO_CPIA2=m
-CONFIG_USB_ZR364XX=m
-CONFIG_USB_STKWEBCAM=m
-CONFIG_USB_S2255=m
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_SOC_CAMERA=m
-CONFIG_SOC_CAMERA_IMX074=m
-CONFIG_SOC_CAMERA_MT9M001=m
-CONFIG_SOC_CAMERA_MT9M111=m
-CONFIG_SOC_CAMERA_MT9T031=m
-CONFIG_SOC_CAMERA_MT9T112=m
-CONFIG_SOC_CAMERA_MT9V022=m
-CONFIG_SOC_CAMERA_RJ54N1=m
-CONFIG_SOC_CAMERA_TW9910=m
-CONFIG_SOC_CAMERA_PLATFORM=m
-CONFIG_SOC_CAMERA_OV2640=m
-CONFIG_SOC_CAMERA_OV5642=m
-CONFIG_SOC_CAMERA_OV6650=m
-CONFIG_SOC_CAMERA_OV772X=m
-CONFIG_SOC_CAMERA_OV9640=m
-CONFIG_SOC_CAMERA_OV9740=m
-CONFIG_V4L_MEM2MEM_DRIVERS=y
-# CONFIG_VIDEO_CSI_SUN4I is not set
-CONFIG_RADIO_SI470X=y
-CONFIG_USB_SI470X=m
-CONFIG_I2C_SI470X=m
-CONFIG_USB_MR800=m
-CONFIG_USB_DSBR=m
-CONFIG_RADIO_SI4713=m
-CONFIG_USB_KEENE=m
-CONFIG_RADIO_TEA5764=m
-CONFIG_RADIO_SAA7706H=m
-CONFIG_RADIO_TEF6862=m
-CONFIG_RADIO_WL1273=m
-CONFIG_AUDIO_ENGINE=y
-CONFIG_PA_CONTROL=y
-CONFIG_DRM=m
-CONFIG_DRM_MALI=m
-CONFIG_DRM_UDL=m
-CONFIG_MALI=m
-CONFIG_MALI400_DEBUG=y
-CONFIG_MALI400_GPU_UTILIZATION=y
-CONFIG_FB=y
-CONFIG_FB_SUNXI=y
-CONFIG_FB_SUNXI_LCD=y
-CONFIG_FB_SUNXI_HDMI=y
-CONFIG_HDMI_CEC=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_SEQUENCER=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_SEQUENCER_OSS=y
-CONFIG_SND_HRTIMER=m
-CONFIG_SND_VERBOSE_PRINTK=y
-CONFIG_SND_ALOOP=m
-CONFIG_SND_USB_AUDIO=m
-CONFIG_SND_SOC=y
-CONFIG_SND_SUNXI_SOC_SPDIF=y
-CONFIG_HIDRAW=y
-CONFIG_UHID=y
-CONFIG_HID_PID=y
-CONFIG_USB_HIDDEV=y
-CONFIG_HID_KYE=y
-CONFIG_HID_LOGITECH_DJ=y
-CONFIG_LOGITECH_FF=y
-# CONFIG_LOGIWHEELS_FF is not set
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_REALTEK=y
-CONFIG_USB_STORAGE_DATAFAB=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_ISD200=y
-CONFIG_USB_STORAGE_USBAT=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_STORAGE_JUMPSHOT=y
-CONFIG_USB_STORAGE_ALAUDA=y
-CONFIG_USB_STORAGE_ONETOUCH=y
-CONFIG_USB_STORAGE_KARMA=y
-CONFIG_USB_STORAGE_CYPRESS_ATACB=y
-CONFIG_USB_STORAGE_ENE_UB6250=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_CONSOLE=y
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_GADGET=y
-CONFIG_USB_FILE_STORAGE=m
-CONFIG_USB_FILE_STORAGE_TEST=y
-CONFIG_MMC=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_USHC=y
-CONFIG_MMC_SUNXI_POWER_CONTROL=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_SUNXI=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_SUN4I=y
-CONFIG_STAGING=y
-CONFIG_ANDROID=y
-CONFIG_ANDROID_BINDER_IPC=y
-CONFIG_ANDROID_LOGGER=y
-CONFIG_ANDROID_RAM_CONSOLE=y
-CONFIG_ANDROID_LOW_MEMORY_KILLER=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_REISERFS_FS=y
-CONFIG_QUOTA=y
-CONFIG_QUOTA_NETLINK_INTERFACE=y
-# CONFIG_PRINT_QUOTA_WARNING is not set
-CONFIG_QFMT_V2=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=y
-CONFIG_CUSE=y
-CONFIG_FSCACHE=y
-CONFIG_FSCACHE_STATS=y
-CONFIG_CACHEFILES=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
-CONFIG_NTFS_FS=y
-CONFIG_NTFS_RW=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CONFIGFS_FS=y
-CONFIG_HFS_FS=y
-CONFIG_HFSPLUS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_V4_1=y
-CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="y"
-CONFIG_ROOT_NFS=y
-CONFIG_NFS_USE_LEGACY_DNS=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3_ACL=y
-CONFIG_NFSD_V4=y
-CONFIG_NFSD_FAULT_INJECTION=y
-CONFIG_CIFS=y
-CONFIG_CIFS_DFS_UPCALL=y
-CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_936=y
-CONFIG_NLS_CODEPAGE_950=y
-CONFIG_NLS_CODEPAGE_932=y
-CONFIG_NLS_CODEPAGE_949=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-CONFIG_FRAME_WARN=2048
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_SECTION_MISMATCH=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_SHIRQ=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_SCHEDSTATS=y
-CONFIG_TIMER_STATS=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_LIST=y
-CONFIG_BOOT_PRINTK_DELAY=y
-CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
-# CONFIG_FTRACE is not set
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_STRICT_DEVMEM=y
-CONFIG_DEBUG_LL=y
-CONFIG_SECURITYFS=y
-# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
-CONFIG_CRYPTO_GF128MUL=y
-CONFIG_CRYPTO_SEQIV=y
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_ZLIB=y
-CONFIG_CRYPTO_LZO=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-# CONFIG_CRYPTO_HW is not set
-CONFIG_LIBCRC32C=y
--- a/bsp/buildroot/board/cubietech/cubieboard/mkcubiecard.sh
+++ b/bsp/buildroot/board/cubietech/cubieboard/mkcubiecard.sh
@@ -1,124 +0,0 @@
-#! /bin/sh
-# mkCubieCard.sh v0.1:
-# 2013, Carlo Caione <carlo.caione@gmail.com>
-# heavely based on :
-# mkA10card.sh v0.1
-# 2012, Jason Plum <jplum@archlinuxarm.org>
-# loosely based on :
-# mkcard.sh v0.5
-# (c) Copyright 2009 Graeme Gregory <dp@xora.org.uk>
-# Licensed under terms of GPLv2
-#
-# Parts of the procudure base on the work of Denys Dmytriyenko
-# http://wiki.omap.com/index.php/MMC_Boot_Format
-
-IMAGES_DIR=$1
-SPL_IMG=$IMAGES_DIR/sunxi-spl.bin
-SPL_UBOOT=$IMAGES_DIR/u-boot-sunxi-with-spl.bin
-UBOOT_IMG=$IMAGES_DIR/u-boot.bin
-UIMAGE=$IMAGES_DIR/uImage
-BIN_BOARD_FILE=$IMAGES_DIR/script.bin
-ROOTFS=$IMAGES_DIR/rootfs.tar
-BOOT_CMD_H=$IMAGES_DIR/boot.scr
-
-export LC_ALL=C
-
-if [ $# -ne 2 ]; then
-	echo "Usage: $0 <images_dir> <drive>"
-	exit 1;
-fi
-
-if [ `id -u` -ne 0 ]; then
-	echo "This script must be run as root" 1>&2
-	exit 1
-fi
-
-if [ ! -f $SPL_IMG  -a ! -f $SPL_UBOOT ] ||
-   [ ! -f $UBOOT_IMG ] ||
-   [ ! -f $UIMAGE ] ||
-   [ ! -f $BIN_BOARD_FILE ] ||
-   [ ! -f $ROOTFS ] ||
-   [ ! -f $BOOT_CMD_H ]; then
-	echo "File(s) missing."
-	exit 1
-fi
-
-DRIVE=$2
-P1=`mktemp -d`
-P2=`mktemp -d`
-
-dd if=/dev/zero of=$DRIVE bs=1M count=3
-
-SIZE=`fdisk -l $DRIVE | grep Disk | grep bytes | awk '{print $5}'`
-
-echo DISK SIZE - $SIZE bytes
-
-
-# ~2048, 16MB, FAT, bootable
-# ~rest of drive, Ext4
-{
-echo 32,512,0x0C,*
-echo 544,,,-
-} | sfdisk -D $DRIVE
-
-sleep 1
-
-if [ -b ${DRIVE}1 ]; then
-	D1=${DRIVE}1
-	umount ${DRIVE}1
-	mkfs.vfat -n "boot" ${DRIVE}1
-else
-	if [ -b ${DRIVE}p1 ]; then
-		D1=${DRIVE}p1
-		umount ${DRIVE}p1
-		mkfs.vfat -n "boot" ${DRIVE}p1
-	else
-		echo "Cant find boot partition in /dev"
-		exit 1
-	fi
-fi
-
-
-if [ -b ${DRIVE}2 ]; then
-	D2=${DRIVE}2
-	umount ${DRIVE}2
-	mkfs.ext4 -L "Cubie" ${DRIVE}2
-else
-	if [ -b ${DRIVE}p2 ]; then
-		D2=${DRIVE}p2
-		umount ${DRIVE}p2
-		mkfs.ext4 -L "Cubie" ${DRIVE}p2
-	else
-		echo "Cant find rootfs partition in /dev"
-		exit 1
-	fi
-fi
-
-mount $D1 $P1
-mount $D2 $P2
-
-# write uImage
-cp $UIMAGE $P1
-# write board file
-cp $BIN_BOARD_FILE $P1
-# write u-boot script
-cp $BOOT_CMD_H $P1
-# write rootfs
-tar -C $P2 -xvf $ROOTFS
-
-sync
-
-umount $D1
-umount $D2
-
-rm -fr $P1
-rm -fr $P2
-
-if [ -e $SPL_UBOOT ]; then
-	dd if=$SPL_UBOOT of=$DRIVE bs=1024 seek=8
-else
-	# write SPL
-	dd if=$SPL_IMG of=$DRIVE bs=1024 seek=8
-	# write mele u-boot
-	dd if=$UBOOT_IMG of=$DRIVE bs=1024 seek=32
-fi
--- a/bsp/buildroot/board/cubietech/cubieboard/post-build.sh
+++ b/bsp/buildroot/board/cubietech/cubieboard/post-build.sh
@@ -1,14 +0,0 @@
-#!/bin/sh
-# post-build.sh for CubieBoard
-# 2013, Carlo Caione <carlo.caione@gmail.com>
-
-BOARD_DIR="$(dirname $0)"
-MKIMAGE=$HOST_DIR/usr/bin/mkimage
-BOOT_CMD=$BOARD_DIR/boot.cmd
-BOOT_CMD_H=$BINARIES_DIR/boot.scr
-
-# U-Boot script
-if [ -e $MKIMAGE -a -e $BOOT_CMD ];
-then
-	$MKIMAGE -C none -A arm -T script -d $BOOT_CMD $BOOT_CMD_H
-fi
--- a/bsp/buildroot/board/cubietech/cubieboard/readme.txt
+++ b/bsp/buildroot/board/cubietech/cubieboard/readme.txt
@@ -1,62 +0,0 @@
-cubieboard and cubieboard2
-
-----
-Intro
-----
-
-To be able to use your cubieboard board with the images generated by
-Buildroot you have to correctly setup the SD card.
-
-For more information, please see http://linux-sunxi.org/FirstSteps
-
---------------
-How to build it
---------------
-
-You need to use the cubieboard_defconfig or cubieboard2_defconfig, to do so:
- * make cubieboard_defconfig
-or
- * make cubieboard2_defconfig
-
-And to compile:
- * make
-
-----------------
-What is generated
-----------------
-
-After building, you should obtain this tree:
-
-    output/images/
-    +-- rootfs.tar
-    +-- boot.scr
-    +-- script.bin
-    +-- sunxi-spl.bin
-    +-- u-boot.bin
-    +-- u-boot-sunxi-with-spl.bin (optional)
-    `-- uImage
-
--------------------------
-How setting up the SD card
--------------------------
-
-Depending on the rootfs size, you might want to use a 2GB or larger SD-card.
-The script mkcubiecard.sh will take care of partitioning and formatting
-the SD-card.
-
-BEWARE! This process will erase your SD card.
-
-Use dmesg to find out where the SD card is attached in the /dev tree
-(<device>) and then:
-
-# sudo ./mkcubiecard.sh <images_dir> <device>
-
-where:
- - <images_dir> is the directory containing the generated files (usually
-   output/images)
- - <device> is the device file of the SD card (usually /dev/sdX)
-
-
-
--
-Carlo Caione <carlo.caione@gmail.com>
--- a/bsp/buildroot/board/digilent/zybo/genimage.cfg
+++ b/bsp/buildroot/board/digilent/zybo/genimage.cfg
@@ -0,0 +1,29 @@
+image boot.vfat {
+  vfat {
+    files = {
+      "BOOT.BIN",
+      "uEnv.txt",
+      "system.bit",
+      "zynq-zybo.dtb",
+      "u-boot-dtb.img",
+      "uImage"
+    }
+  }
+  size = 32M
+}
+
+image sdcard.img {
+  hdimage {
+  }
+
+  partition boot {
+    partition-type = 0xC
+    bootable = "true"
+    image = "boot.vfat"
+  }
+
+  partition rootfs {
+    partition-type = 0x83
+    image = "rootfs.ext4"
+  }
+}
--- a/bsp/buildroot/board/olimex/imx233_olinuxino/post-image.sh
+++ b/bsp/buildroot/board/olimex/imx233_olinuxino/post-image.sh
@@ -1,20 +1,18 @@
 #!/bin/sh

 BOARD_DIR="$(dirname $0)"
-BOARD_NAME="$(basename ${BOARD_DIR})"
-GENIMAGE_CFG="${BOARD_DIR}/genimage-${BOARD_NAME}.cfg"
+GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
 GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-# Create symlink to "rename" kernel image
-ln -sf uImage.imx23-olinuxino ${BINARIES_DIR}/uImage
+OUTPUT_DIR="${O}/images"

 rm -rf "${GENIMAGE_TMP}"

-genimage                           \
+cp board/digilent/zybo/uEnv.txt ${BINARIES_DIR}
+cp board/digilent/zybo/system.bit ${BINARIES_DIR}
+
+genimage                               \
 	--rootpath "${TARGET_DIR}"     \
 	--tmppath "${GENIMAGE_TMP}"    \
 	--inputpath "${BINARIES_DIR}"  \
 	--outputpath "${BINARIES_DIR}" \
 	--config "${GENIMAGE_CFG}"
-
-exit $?
--- a/bsp/buildroot/board/digilent/zybo/readme.txt
+++ b/bsp/buildroot/board/digilent/zybo/readme.txt
@@ -0,0 +1,76 @@
+Digilent Zybo
+=============
+
+This is the Buildroot board support for the Digilent Zybo. The Zybo is
+a development board based on the Xilinx Zynq-7000 based All-Programmable
+System-On-Chip.
+
+Zybo information including schematics, reference designs, and manuals are
+available from http://store.digilentinc.com/zybo-zynq-7000-arm-fpga-soc-trainer-board/ .
+
+If you want a custom FPGA bitstream to be loaded by U-Boot, copy it as
+system.bit in board/digilent/zybo/.
+
+Steps to create a working system for Zybo:
+
+1) make zynq_zybo_defconfig
+2) make
+3) write your SD Card with the sdcard.img file using dd by doing
+  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
+4) insert the SD Card and power up your Zybo
+5) Expect serial console on the second USB serial port exposed by the board
+
+The expected output:
+
+ U-Boot SPL 2016.05 (May 20 2016 - 16:16:24)
+ mmc boot
+ Trying to boot from MMC1
+ reading system.dtb
+ spl_load_image_fat_os: error reading image system.dtb, err - -1
+ reading u-boot-dtb.img
+ reading u-boot-dtb.img
+
+
+ U-Boot 2016.05 (May 20 2016 - 16:16:24 +0200)
+
+ Model: Zynq ZYBO Development Board
+ Board: Xilinx Zynq
+ I2C:   ready
+ DRAM:  ECC disabled 512 MiB
+ MMC:   sdhci@e0100000: 0
+ SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB
+ In:    serial@e0001000
+ Out:   serial@e0001000
+ Err:   serial@e0001000
+ Model: Zynq ZYBO Development Board
+ Board: Xilinx Zynq
+ Net:   ZYNQ GEM: e000b000, phyaddr 0, interface rgmii-id
+ I2C EEPROM MAC address read failed
+
+ Warning: ethernet@e000b000 (eth0) using random MAC address - 56:64:dd:a7:6d:94
+ eth0: ethernet@e000b000
+ ...
+
+Resulting system
+----------------
+Once the build process is finished you will have an image called "sdcard.img"
+in the output/images/ directory.
+
+The first partition is a FAT32 partition created at the beginning of the SD Card
+that contains the following files :
+    /BOOT.BIN
+    /zynq-zybo.dtb
+    /uEnv.txt
+    /system.bit
+    /uImage
+    /u-boot-dtb.img
+
+The second partition is an ext4 partition that contains the root filesystem.
+
+You can alter the booting procedure by modifying the uEnv.txt file
+in first partition of the SD card. It is a plain text file in format
+<key>=<value> one per line:
+
+kernel_image=myimage
+modeboot=myboot
+myboot=...
--- a/bsp/buildroot/board/digilent/zybo/system.bit
+++ b/bsp/buildroot/board/digilent/zybo/system.bit
--- a/bsp/buildroot/board/digilent/zybo/uEnv.txt
+++ b/bsp/buildroot/board/digilent/zybo/uEnv.txt
@@ -0,0 +1,5 @@
+bootargs=root=/dev/mmcblk0p2 rootwait rw rootfstype=ext4
+fpga_image=system.bit
+fpgaboot=if fatload mmc 0 0x1000000 ${fpga_image}; then echo Booting FPGA from ${fpga_image}; fpga info 0 && fpga loadb 0 0x1000000 $filesize; else echo FPGA image ${fpga_image} was not found, skipping...; fi;
+kernel_image=uImage
+sdboot=echo Booting from SD...; run fpgaboot; fatload mmc 0 0x1000000 ${kernel_image} && fatload mmc 0 0x2000000 zynq-zybo.dtb && bootm 0x1000000 - 0x2000000
--- a/bsp/buildroot/board/freescale/common/imx/genimage.cfg.template
+++ b/bsp/buildroot/board/freescale/common/imx/genimage.cfg.template
@@ -1,17 +1,16 @@
-# Minimal SD card image for the Freescale's i.MX25 PDK board
+# Minimal SD card image for the Freescale boards Template
 #
-# We mimic the .sdcard Freescale's image format for i.MX25:
+# We mimic the .sdcard Freescale's image format:
 # * the SD card must have 1 kB free space at the beginning,
 # * U-Boot is dumped as is,
-# * a FAT partition at offset 8 MB is containing zImage and dtbs,
-# * a single root filesystem partition is required (Ext4 in this case).
+# * a FAT partition at offset 8 MB is containing zImage/uImage and DTB files
+# * a single root filesystem partition is required (ext2, ext3 or ext4)
 #

 image boot.vfat {
  vfat {
    files = {
-      "imx25-pdk.dtb",
-      "zImage"
+      %FILES%
    }
  }
  size = 16M
@@ -36,6 +35,6 @@ image sdcard.img {

  partition rootfs {
    partition-type = 0x83
-    image = "rootfs.ext4"
+    image = "rootfs.ext2"
  }
 }
--- a/bsp/buildroot/board/freescale/common/imx/post-image.sh
+++ b/bsp/buildroot/board/freescale/common/imx/post-image.sh
@@ -0,0 +1,54 @@
+#!/usr/bin/env bash
+
+#
+# dtb_list extracts the list of DTB files from BR2_LINUX_KERNEL_INTREE_DTS_NAME
+# in ${BR_CONFIG}, then prints the corresponding list of file names for the
+# genimage configuration file
+#
+dtb_list()
+{
+	local DTB_LIST="$(sed -n 's/^BR2_LINUX_KERNEL_INTREE_DTS_NAME="\([a-z0-9 \-]*\)"$/\1/p' ${BR2_CONFIG})"
+
+	for dt in $DTB_LIST; do
+		echo -n "\"$dt.dtb\", "
+	done
+}
+
+#
+# linux_image extracts the Linux image format from BR2_LINUX_KERNEL_UIMAGE in
+# ${BR_CONFIG}, then prints the corresponding file name for the genimage
+# configuration file
+#
+linux_image()
+{
+	if grep -Eq "^BR2_LINUX_KERNEL_UIMAGE=y$" ${BR2_CONFIG}; then
+		echo "\"uImage\""
+	else
+		echo "\"zImage\""
+	fi
+}
+
+main()
+{
+	local FILES="$(dtb_list) $(linux_image)"
+	local GENIMAGE_CFG="$(mktemp --suffix genimage.cfg)"
+	local GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
+
+	sed -e "s/%FILES%/${FILES}/" \
+		board/freescale/common/imx/genimage.cfg.template > ${GENIMAGE_CFG}
+
+	rm -rf "${GENIMAGE_TMP}"
+
+	genimage \
+		--rootpath "${TARGET_DIR}" \
+		--tmppath "${GENIMAGE_TMP}" \
+		--inputpath "${BINARIES_DIR}" \
+		--outputpath "${BINARIES_DIR}" \
+		--config "${GENIMAGE_CFG}"
+
+	rm -f ${GENIMAGE_CFG}
+
+	exit $?
+}
+
+main $@
--- a/bsp/buildroot/board/freescale/common/mxs/genimage.cfg.template
+++ b/bsp/buildroot/board/freescale/common/mxs/genimage.cfg.template
@@ -0,0 +1,39 @@
+# Minimal SD card image for the Freescale MX23/MX28 Template
+#
+# We mimic the .sdcard Freescale's MX23/MX28 image format:
+# * u-boot.sb is placed at offset 1M,
+# * a FAT partition at offset 16 MB is containing zImage/uImage and DTB files
+# * a single root filesystem partition is required (ext2, ext3 or ext4)
+#
+
+image boot.vfat {
+	vfat {
+		files = {
+			%FILES%
+		}
+	}
+	size = 16M
+}
+
+image sdcard.img {
+	hdimage {
+	}
+
+	partition u-boot {
+		partition-type = 0x53
+		image = "u-boot.sd"
+		offset = 1M
+		size = 16M
+	}
+
+	partition kernel {
+		partition-type = 0xC
+		bootable = "true"
+		image = "boot.vfat"
+	}
+
+	partition rootfs {
+		partition-type = 0x83
+		image = "rootfs.ext2"
+	}
+}
--- a/bsp/buildroot/board/freescale/common/mxs/post-image.sh
+++ b/bsp/buildroot/board/freescale/common/mxs/post-image.sh
@@ -0,0 +1,54 @@
+#!/usr/bin/env bash
+
+#
+# dtb_list extracts the list of DTB files from BR2_LINUX_KERNEL_INTREE_DTS_NAME
+# in ${BR_CONFIG}, then prints the corresponding list of file names for the
+# genimage configuration file
+#
+dtb_list()
+{
+	local DTB_LIST="$(sed -n 's/^BR2_LINUX_KERNEL_INTREE_DTS_NAME="\([a-z0-9 \-]*\)"$/\1/p' ${BR2_CONFIG})"
+
+	for dt in $DTB_LIST; do
+		echo -n "\"$dt.dtb\", "
+	done
+}
+
+#
+# linux_image extracts the Linux image format from BR2_LINUX_KERNEL_UIMAGE in
+# ${BR_CONFIG}, then prints the corresponding file name for the genimage
+# configuration file
+#
+linux_image()
+{
+	if grep -Eq "^BR2_LINUX_KERNEL_UIMAGE=y$" ${BR2_CONFIG}; then
+		echo "\"uImage\""
+	else
+		echo "\"zImage\""
+	fi
+}
+
+main()
+{
+	local FILES="$(dtb_list) $(linux_image)"
+	local GENIMAGE_CFG="$(mktemp --suffix genimage.cfg)"
+	local GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
+
+	sed -e "s/%FILES%/${FILES}/" \
+		board/freescale/common/mxs/genimage.cfg.template > ${GENIMAGE_CFG}
+
+	rm -rf "${GENIMAGE_TMP}"
+
+	genimage \
+		--rootpath "${TARGET_DIR}" \
+		--tmppath "${GENIMAGE_TMP}" \
+		--inputpath "${BINARIES_DIR}" \
+		--outputpath "${BINARIES_DIR}" \
+		--config "${GENIMAGE_CFG}"
+
+	rm -f ${GENIMAGE_CFG}
+
+	exit $?
+}
+
+main $@
--- a/bsp/buildroot/board/freescale/create-boot-sd.sh
+++ b/bsp/buildroot/board/freescale/create-boot-sd.sh
@@ -1,93 +0,0 @@
-#!/bin/sh
-
-set -u
-set -e
-
-PROGNAME=$(basename $0)
-
-usage()
-{
-    echo "Create an SD card that boots on an i.MX53/6 board."
-    echo
-    echo "Note: all data on the the card will be completely deleted!"
-    echo "Use with care!"
-    echo "Superuser permissions may be required to write to the device."
-    echo
-    echo "Usage: ${PROGNAME} <sd_block_device>"
-    echo "Arguments:"
-    echo "  <sd_block_device>     The device to be written to"
-    echo
-    echo "Example: ${PROGNAME} /dev/mmcblk0"
-    echo
-}
-
-if [ $# -ne 1 ]; then
-    usage
-    exit 1
-fi
-
-if [ $(id -u) -ne 0 ]; then
-    echo "${PROGNAME} must be run as root"
-    exit 1
-fi
-
-DEV=${1}
-
-# The partition name prefix depends on the device name:
-# - /dev/sde -> /dev/sde1
-# - /dev/mmcblk0 -> /dev/mmcblk0p1
-if echo ${DEV}|grep -q mmcblk ; then
-    PART="p"
-else
-    PART=""
-fi
-
-PART1=${DEV}${PART}1
-PART2=${DEV}${PART}2
-
-# Unmount the partitions if mounted
-umount ${PART1} || true
-umount ${PART2} || true
-
-# First, clear the card
-dd if=/dev/zero of=${DEV} bs=1M count=20
-
-sync
-
-# Partition the card.
-# SD layout for i.MX6 boot:
-# - Bootloader at offset 1024
-# - FAT partition starting at 1MB offset, containing uImage and *.dtb
-# - ext2/3 partition formatted as ext2 or ext3, containing the root filesystem.
-sfdisk ${DEV} <<EOF
-32,480,b
-512,,L
-EOF
-
-sync
-
-# Copy the bootloader at offset 1024
-dd if=output/images/u-boot.imx of=${DEV} obs=512 seek=2
-
-# Prepare a temp dir for mounting partitions
-TMPDIR=$(mktemp -d)
-
-# FAT partition: kernel and DTBs
-mkfs.vfat ${PART1}
-mount ${PART1} ${TMPDIR}
-cp output/images/*Image ${TMPDIR}/
-cp output/images/*.dtb  ${TMPDIR}/ || true
-sync
-umount ${TMPDIR}
-
-# ext2 partition: root filesystem
-mkfs.ext2 ${PART2}
-mount ${PART2} ${TMPDIR}
-tar -C ${TMPDIR}/ -xf output/images/rootfs.tar
-sync
-umount ${TMPDIR}
-
-# Cleanup
-rmdir ${TMPDIR}
-sync
-echo Done
--- a/bsp/buildroot/board/freescale/imx23evk/readme.txt
+++ b/bsp/buildroot/board/freescale/imx23evk/readme.txt
@@ -0,0 +1,48 @@
+**************************
+Freescale i.MX23 EVK board
+**************************
+
+This file documents the Buildroot support for the Freescale i.MX23 EVK board.
+
+Build
+=====
+
+First, configure Buildroot for your i.MX23 EVK board:
+
+  make imx23evk_defconfig
+
+Build all components:
+
+  make
+
+You will find in output/images/ directory the following files:
+  - imx23-evk.dtb
+  - rootfs.tar
+  - u-boot.sd
+  - zImage
+
+Create a bootable SD card
+=========================
+
+To determine the device associated to the SD card have a look in the
+/proc/partitions file:
+
+  cat /proc/partitions
+
+Then, run the following command:
+
+*** WARNING! The command will destroy all the card content. Use with care! ***
+
+ sudo dd if=output/images/sdcard.img of=/dev/<your-microsd-device>
+
+Boot the i.MX23 EVK board
+=========================
+
+- Put the Boot Mode Select jumper as 1 0 0 1 so that it can boot
+  from the SD card
+- Insert the SD card in the SD Card slot of the board;
+- Connect an RS232 UART cable to the Debug UART Port and connect using a
+  terminal emulator at 115200 bps, 8n1;
+- power on the board.
+
+Enjoy!
--- a/bsp/buildroot/board/freescale/imx25pdk/readme.txt
+++ b/bsp/buildroot/board/freescale/imx25pdk/readme.txt
@@ -40,7 +40,7 @@ command as root:
 *** WARNING! This will destroy all the card content. Use with care! ***

 For details about the medium image layout, see the definition in
-board/freescale/imx25pdk/genimage.cfg.
+board/freescale/common/imx/genimage.cfg.template.

 Boot the i.MX25 PDK board
 =========================
--- a/bsp/buildroot/board/freescale/imx28evk/create-boot-sd.sh
+++ b/bsp/buildroot/board/freescale/imx28evk/create-boot-sd.sh
@@ -1,97 +0,0 @@
-#!/bin/sh
-
-set -u
-set -e
-
-PROGNAME=$(basename $0)
-
-usage()
-{
-    echo "Create an SD card that boots on an i.MX28 EVK board."
-    echo
-    echo "Note: all data on the the card will be completely deleted!"
-    echo "Use with care!"
-    echo "Superuser permissions may be required to write to the device."
-    echo
-    echo "Usage: ${PROGNAME} <sd_block_device>"
-    echo "Arguments:"
-    echo "  <sd_block_device>     The device to be written to"
-    echo
-    echo "Example: ${PROGNAME} /dev/mmcblk0"
-    echo
-}
-
-if [ $# -ne 1 ]; then
-    usage
-    exit 1
-fi
-
-if [ $(id -u) -ne 0 ]; then
-    echo "${PROGNAME} must be run as root"
-    exit 1
-fi
-
-DEV=${1}
-
-# The partition name prefix depends on the device name:
-# - /dev/sde -> /dev/sde1
-# - /dev/mmcblk0 -> /dev/mmcblk0p1
-if echo ${DEV}|grep -q mmcblk ; then
-    PART="p"
-else
-    PART=""
-fi
-
-PART1=${DEV}${PART}1
-PART2=${DEV}${PART}2
-PART3=${DEV}${PART}3
-
-# Unmount the partitions if mounted
-umount ${PART1} || true
-umount ${PART2} || true
-umount ${PART3} || true
-
-# First, clear the card
-dd if=/dev/zero of=${DEV} bs=1M count=20
-
-sync
-
-# Partition the card.
-# SD layout for i.MX28 boot:
-# - Special partition type 53 at sector 2048, containing an SD-SB-encapsulated u-boot
-# - FAT partition containing zImage
-# - ext2/3 partition formatted as ext2 or ext3, containing the root filesystem.
-sfdisk --force -u S ${DEV} <<EOF
-2048,2000,53
-4048,16000,b
-20048,,L
-EOF
-
-sync
-
-# Copy the bootloader at offset 2048
-# (We need to skip the partition table in the .sd, too.)
-dd if=output/images/u-boot.sd of=${DEV}1 bs=1M
-
-# Prepare a temp dir for mounting partitions
-TMPDIR=$(mktemp -d)
- 
-# FAT partition: kernel
-mkfs.vfat ${PART2}
-mount ${PART2} ${TMPDIR}
-cp output/images/*Image ${TMPDIR}/
-cp output/images/*.dtb  ${TMPDIR}/ || true
-sync
-umount ${TMPDIR}
-
-# ext2 partition: root filesystem
-mkfs.ext2 ${PART3}
-mount ${PART3} ${TMPDIR}
-tar -C ${TMPDIR}/ -xf output/images/rootfs.tar
-sync
-umount ${TMPDIR}
-
-# Cleanup
-rmdir ${TMPDIR}
-sync
-echo Done
--- a/bsp/buildroot/board/freescale/imx28evk/readme.txt
+++ b/bsp/buildroot/board/freescale/imx28evk/readme.txt
@@ -32,12 +32,11 @@ To determine the device associated to the SD card have a look in the

  cat /proc/partitions

-Run the following script as root on your SD card. This will partition the card
-and copy the bootloader, kernel and root filesystem as needed.
+Then, run the following command as root:

-*** WARNING! The script will destroy all the card content. Use with care! ***
+*** WARNING! The command will destroy all the card content. Use with care! ***

-  ./board/freescale/imx28evk/create-boot-sd.sh <your-sd-device>
+ sudo dd if=output/images/sdcard.img of=/dev/<your-microsd-device>

 Boot the i.MX28 EVK board
 =========================
--- a/bsp/buildroot/board/freescale/imx31_3stack/linux.fragment
+++ b/bsp/buildroot/board/freescale/imx31_3stack/linux.fragment
@@ -0,0 +1 @@
+# CONFIG_FB_MXS is not set
--- a/bsp/buildroot/board/freescale/imx51evk/genimage.cfg
+++ b/bsp/buildroot/board/freescale/imx51evk/genimage.cfg
@@ -1,41 +0,0 @@
-# Minimal SD card image for the Freescale's i.MX51 EVK board
-#
-# We mimic the .sdcard Freescale's image format for i.MX51:
-# * the microSD card must have 1 kB free space at the beginning,
-# * U-Boot is dumped as is,
-# * a FAT partition at offset 8 MB is containing zImage and dtbs,
-# * a single root filesystem partition is required (Ext4 in this case).
-#
-
-image boot.vfat {
-  vfat {
-    files = {
-      "imx51-babbage.dtb",
-      "zImage"
-    }
-  }
-  size = 16M
-}
-
-image sdcard.img {
-  hdimage {
-  }
-
-  partition u-boot {
-    in-partition-table = "no"
-    image = "u-boot.imx"
-    offset = 1024
-  }
-
-  partition boot {
-    partition-type = 0xC
-    bootable = "true"
-    image = "boot.vfat"
-    offset = 8M
-  }
-
-  partition rootfs {
-    partition-type = 0x83
-    image = "rootfs.ext4"
-  }
-}
--- a/bsp/buildroot/board/freescale/imx51evk/readme.txt
+++ b/bsp/buildroot/board/freescale/imx51evk/readme.txt
@@ -40,7 +40,7 @@ command as root:
 *** WARNING! This will destroy all the card content. Use with care! ***

 For details about the medium image layout, see the definition in
-board/freescale/imx51evk/genimage.cfg.
+board/freescale/common/imx/genimage.cfg.template.

 Boot the i.MX51 EVK board
 =========================
--- a/bsp/buildroot/board/freescale/imx53loco/genimage.cfg
+++ b/bsp/buildroot/board/freescale/imx53loco/genimage.cfg
@@ -1,42 +0,0 @@
-# Minimal microSD card image for the Freescale's i.MX53 QSB board
-#
-# We mimic the .sdcard Freescale's image format for i.MX53:
-# * the microSD card must have 1 kB free space at the beginning,
-# * U-Boot is dumped as is,
-# * a FAT partition at offset 8 MB is containing zImage and dtbs,
-# * a single root filesystem partition is required (Ext4 in this case).
-#
-
-image boot.vfat {
-  vfat {
-    files = {
-      "imx53-qsb.dtb",
-      "imx53-qsrb.dtb",
-      "zImage"
-    }
-  }
-  size = 16M
-}
-
-image sdcard.img {
-  hdimage {
-  }
-
-  partition u-boot {
-    in-partition-table = "no"
-    image = "u-boot.imx"
-    offset = 1024
-  }
-
-  partition boot {
-    partition-type = 0xC
-    bootable = "true"
-    image = "boot.vfat"
-    offset = 8M
-  }
-
-  partition rootfs {
-    partition-type = 0x83
-    image = "rootfs.ext4"
-  }
-}
--- a/bsp/buildroot/board/freescale/imx6q-sabresd/readme.txt
+++ b/bsp/buildroot/board/freescale/imx6q-sabresd/readme.txt
@@ -0,0 +1,57 @@
+*******************************
+Freescale i.MX6Q Sabre SD board
+*******************************
+
+This file documents the Buildroot support for the Freescale i.MX6Q Sabre SD
+board.
+
+This configuration uses U-Boot mainline and kernel mainline.
+
+Build
+=====
+
+First, configure Buildroot for the i.MX6Q Sabre SD board:
+
+  make imx6q-sabresd_defconfig
+
+Build all components:
+
+  make
+
+You will find the following files in output/images/ :
+  - imx6q-sabresd.dtb
+  - rootfs.ext4
+  - rootfs.tar
+  - sdcard.img
+  - u-boot.imx
+  - zImage
+
+Create a bootable SD card
+=========================
+
+To determine the device associated to the SD card have a look in the
+/proc/partitions file:
+
+  cat /proc/partitions
+
+Buildroot prepares a bootable "sdcard.img" image in the output/images/
+directory, ready to be dumped on a SD card. Launch the following
+command as root:
+
+  dd if=output/images/sdcard.img of=/dev/<your-sd-device>
+
+*** WARNING! This will destroy all the card content. Use with care! ***
+
+For details about the medium image layout, see the definition in
+board/freescale/common/imx/genimage.cfg.template.
+
+Boot the i.MX6Q Sabre SD board
+==============================
+
+To boot your newly created system:
+- insert the SD card in the SD3 slot of the board (close to the HDMI connector);
+- put a micro USB cable into the Debug USB Port and connect using a terminal
+  emulator at 115200 bps, 8n1;
+- power on the board.
+
+Enjoy!
--- a/bsp/buildroot/board/freescale/imx6sabre/readme.txt
+++ b/bsp/buildroot/board/freescale/imx6sabre/readme.txt
@@ -62,12 +62,16 @@ To determine the device associated to the SD card have a look in the

  cat /proc/partitions

-Run the following script as root on your SD card. This will partition the card
-and copy the bootloader, kernel, DTBs and root filesystem as needed.
+Buildroot prepares a bootable "sdcard.img" image in the output/images/
+directory, ready to be dumped on a microSD card. Launch the following
+command as root:
+
+  dd if=./output/images/sdcard.img of=/dev/<your-microsd-device>

 *** WARNING! The script will destroy all the card content. Use with care! ***

-  ./board/freescale/create-boot-sd.sh <your-sd-device>
+For details about the medium image layout, see the definition in
+board/freescale/common/imx/genimage.cfg.template.

 Boot the SABRE board
 ====================
--- a/bsp/buildroot/board/freescale/imx6ulevk/post-image.sh
+++ b/bsp/buildroot/board/freescale/imx6ulevk/post-image.sh
@@ -1,14 +0,0 @@
-#!/usr/bin/env bash
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage \
-  --rootpath "${TARGET_DIR}" \
-  --tmppath "${GENIMAGE_TMP}" \
-  --inputpath "${BINARIES_DIR}" \
-  --outputpath "${BINARIES_DIR}" \
-  --config "${GENIMAGE_CFG}"
--- a/bsp/buildroot/board/freescale/imx6ulevk/readme.txt
+++ b/bsp/buildroot/board/freescale/imx6ulevk/readme.txt
@@ -43,7 +43,7 @@ command as root:
 *** WARNING! This will destroy all the card content. Use with care! ***

 For details about the medium image layout, see the definition in
-board/freescale/imx6ulevk/genimage.cfg.
+board/freescale/common/imx/genimage.cfg.template.

 Boot the i.MX6UL EVK board
 =========================
--- a/bsp/buildroot/board/freescale/imx7dsdb/genimage.cfg
+++ b/bsp/buildroot/board/freescale/imx7dsdb/genimage.cfg
@@ -1,41 +0,0 @@
-# Minimal microSD card image for the Freescale's i.MX7D SDB board
-#
-# We mimic the .sdcard Freescale's image format for i.MX7D:
-# * the microSD card must have 1 kB free space at the beginning,
-# * U-Boot is dumped as is,
-# * a FAT partition at offset 8 MB is containing zImage and dtbs,
-# * a single root filesystem partition is required (Ext4 in this case).
-#
-
-image boot.vfat {
-  vfat {
-    files = {
-      "imx7d-sdb.dtb",
-      "zImage"
-    }
-  }
-  size = 16M
-}
-
-image sdcard.img {
-  hdimage {
-  }
-
-  partition u-boot {
-    in-partition-table = "no"
-    image = "u-boot.imx"
-    offset = 1024
-  }
-
-  partition boot {
-    partition-type = 0xC
-    bootable = "true"
-    image = "boot.vfat"
-    offset = 8M
-  }
-
-  partition rootfs {
-    partition-type = 0x83
-    image = "rootfs.ext4"
-  }
-}
--- a/bsp/buildroot/board/freescale/imx7dsdb/post-image.sh
+++ b/bsp/buildroot/board/freescale/imx7dsdb/post-image.sh
@@ -1,14 +0,0 @@
-#!/usr/bin/env bash
-
-BOARD_DIR="$(dirname $0)"
-GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
-GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
-
-rm -rf "${GENIMAGE_TMP}"
-
-genimage \
-  --rootpath "${TARGET_DIR}" \
-  --tmppath "${GENIMAGE_TMP}" \
-  --inputpath "${BINARIES_DIR}" \
-  --outputpath "${BINARIES_DIR}" \
-  --config "${GENIMAGE_CFG}"
--- a/bsp/buildroot/board/freescale/imx7dsdb/readme.txt
+++ b/bsp/buildroot/board/freescale/imx7dsdb/readme.txt
@@ -40,7 +40,7 @@ command as root:
 *** WARNING! This will destroy all the card content. Use with care! ***

 For details about the medium image layout, see the definition in
-board/freescale/imx7dsdb/genimage.cfg.
+board/freescale/common/imx/genimage.cfg.template.

 Boot the i.MX7D SDB board
 =========================
--- a/bsp/buildroot/board/freescale/mpc8315erdb/readme.txt
+++ b/bsp/buildroot/board/freescale/mpc8315erdb/readme.txt
@@ -1,14 +1,3 @@
-
-******************** WARNING ********************
-The compiled U-Boot binary is intended for NAND flash only!
-It won't work for NOR and will brick that bootloader!
-
-Also don't go playing around with different U-boot versions or flash targets
-unless you've got the necessary hardware and/or know-how to unbrick your kit.
-
-2014.04 is known good for NAND.
-******************** WARNING ********************
-
 You'll need to program the files created by buildroot into the flash.
 The fast way is to tftp transfer the files via one of the network interfaces.

@@ -17,36 +6,25 @@ file transfer from your terminal program by using a "loady" command
 from the u-boot prompt instead of the "tftp ..." commands stated below.
 Beware that serial console file transfers are quite slow!

-Remember to set the MPC8315ERDB switches to NAND boot if you want to use
-your newly built U-Boot.
-
-1. Program the new U-Boot binary to NAND flash (optional)
-    If you don't feel confident upgrading your bootloader then don't do it,
-    it's unnecessary most of the time.
-
-    => tftp $loadaddr u-boot-nand.bin
-    => nand erase 0 0x80000
-    => nand write $loadaddr 0 0x80000 $filesize
-
-2. Program the kernel to NAND flash
+1. Program the kernel to NAND flash

    => tftp $loadaddr uImage
    => nand erase 0x100000 0x1e0000
    => nand write $loadaddr 0x100000 0x1e0000

-3. Program the DTB to NAND flash
+2. Program the DTB to NAND flash

    => tftp $loadaddr mpc8315erdb.dtb
    => nand erase 0x2e0000 0x20000
    => nand write $loadaddr 0x2e0000 0x20000

-4. Program the root filesystem to NAND flash
+3. Program the root filesystem to NAND flash

    => tftp $loadaddr rootfs.jffs2
    => nand erase 0x400000 0x1c00000
    => nand write $loadaddr 0x400000 $filesize

-5. Booting your new system
+4. Booting your new system

    => setenv nandboot 'setenv bootargs root=/dev/mtdblock3 rootfstype=jffs2 console=$consoledev,$baudrate;nand read $fdtaddr 0x2e0000 0x20000;nand read $loadaddr 0x100000 0x1e0000;bootm $loadaddr - $fdtaddr'

--- a/bsp/buildroot/board/freescale/p1010rdb/readme.txt
+++ b/bsp/buildroot/board/freescale/p1010rdb/readme.txt
@@ -1,28 +1,3 @@
-
-******************** WARNING ********************
-The compiled U-Boot binary is intended for NOR flash only!
-It won't work for NAND or SPI and will brick those bootloaders!
-
-Also don't go playing around with different U-boot versions or flash targets
-unless you've got the necessary hardware and/or know-how to unbrick your kit.
-
-2014.01 is known good for NOR on the P1010RDB-PA kit.
-
-Freescale released a revised version of the kit with a faster processor and
-some other hardware changes named P1010RDB-PB. U-Boot needs to be configured
-differently for this kit hence this default config WILL NOT WORK.
-This is ONLY related to U-Boot, otherwise the configuration is the same,
-you can perfectly use the generated kernel and rootfs.
-
-IF you want to build an U-Boot for the new kit just change
-BR2_TARGET_UBOOT_BOARDNAME from P1010RDB-PA_NOR to P1010RDB-PB_NOR.
-!!!!! THIS IS COMPLETELY UNTESTED BY BR DEVS SO YOU ARE ON YOUR OWN !!!!!
-If it works we'd like to know so drop an email to the mailing list. Thanks.
-
-If your kit doesn't mention PA nor PB in their shipping inventory then it's
-the old version (PA).
-******************** WARNING ********************
-
 You'll need to program the files created by buildroot into the flash.
 The fast way is to tftp transfer the files via one of the network interfaces.

@@ -31,37 +6,25 @@ file transfer from your terminal program by using a "loady" command
 from the u-boot prompt instead of the "tftp ..." commands stated below.
 Beware that serial console file transfers are quite slow!

-Remember to set the P1010RDB switches to NOR boot if you want to use
-your newly built U-Boot.
-
-1. Program the new U-Boot binary to NOR flash (optional)
-    If you don't feel confident upgrading your bootloader then don't do it,
-    it's unnecessary most of the time.
-
-    => tftp $loadaddr u-boot.bin
-    => protect off 0xeff80000 +$filesize
-    => erase 0xeff80000 +$filesize
-    => cp.b $loadaddr 0xeff80000 $filesize
-
-2. Program the DTB to NOR flash
+1. Program the DTB to NOR flash

    => tftp $loadaddr p1010rdb-pa.dtb
    => erase 0xee000000 +$filesize
    => cp.b $loadaddr 0xee000000 $filesize

-3. Program the kernel to NOR flash
+2. Program the kernel to NOR flash

    => tftp $loadaddr uImage
    => erase 0xee080000 +$filesize
    => cp.b $loadaddr 0xee080000 $filesize

-4. Program the root filesystem to NOR flash
+3. Program the root filesystem to NOR flash

    => tftp $loadaddr rootfs.jffs2
    => erase 0xee800000 0xeff5ffff
    => cp.b $loadaddr 0xee800000 $filesize

-5. Booting your new system
+4. Booting your new system

    => setenv norboot 'setenv bootargs root=/dev/mtdblock2 rootfstype=jffs2 console=$consoledev,$baudrate;bootm 0xee080000 - 0xee000000'

--- a/bsp/buildroot/board/freescale/p2020ds/linux-3.12.config
+++ b/bsp/buildroot/board/freescale/p2020ds/linux-3.12.config
@@ -1,374 +0,0 @@
-CONFIG_PPC_85xx=y
-CONFIG_PHYS_64BIT=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=8
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_FHANDLE=y
-CONFIG_AUDIT=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=16
-CONFIG_CGROUPS=y
-CONFIG_NAMESPACES=y
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_ALL=y
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_POWERNV_MSI is not set
-CONFIG_MPC85xx_DS=y
-CONFIG_HIGHMEM=y
-CONFIG_HOTPLUG_CPU=y
-CONFIG_IRQ_ALL_CPUS=y
-CONFIG_FORCE_MAX_ZONEORDER=12
-# CONFIG_SUSPEND is not set
-CONFIG_PCI=y
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCI_MSI=y
-CONFIG_RAPIDIO=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_NET_KEY=m
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_NET_IPIP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-CONFIG_INET_ESP=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-CONFIG_NETWORK_SECMARK=y
-CONFIG_NETFILTER=y
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CONNTRACK_SECMARK=y
-CONFIG_NF_CONNTRACK_ZONES=y
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CONNTRACK_TIMEOUT=y
-CONFIG_NF_CONNTRACK_TIMESTAMP=y
-CONFIG_NF_CT_PROTO_DCCP=m
-CONFIG_NF_CT_PROTO_UDPLITE=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-CONFIG_NF_CONNTRACK_NETBIOS_NS=m
-CONFIG_NF_CONNTRACK_SNMP=m
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SANE=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NF_CT_NETLINK_TIMEOUT=m
-CONFIG_NF_CT_NETLINK_HELPER=m
-CONFIG_NETFILTER_NETLINK_QUEUE_CT=y
-CONFIG_NETFILTER_XT_TARGET_AUDIT=m
-CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
-CONFIG_NETFILTER_XT_TARGET_DSCP=m
-CONFIG_NETFILTER_XT_TARGET_HMARK=m
-CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
-CONFIG_NETFILTER_XT_TARGET_LED=m
-CONFIG_NETFILTER_XT_TARGET_LOG=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
-CONFIG_NETFILTER_XT_TARGET_TEE=m
-CONFIG_NETFILTER_XT_TARGET_TPROXY=m
-CONFIG_NETFILTER_XT_TARGET_TRACE=m
-CONFIG_NETFILTER_XT_TARGET_SECMARK=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
-CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
-CONFIG_NETFILTER_XT_MATCH_BPF=m
-CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_CPU=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_NFACCT=m
-CONFIG_NETFILTER_XT_MATCH_OSF=m
-CONFIG_NETFILTER_XT_MATCH_OWNER=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_RATEEST=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_RECENT=m
-CONFIG_NETFILTER_XT_MATCH_SOCKET=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_TIME=m
-CONFIG_NETFILTER_XT_MATCH_U32=m
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_RPFILTER=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_SYNPROXY=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT_IPV4=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_AH=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_MH=m
-CONFIG_IP6_NF_MATCH_RPFILTER=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_TARGET_SYNPROXY=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_RAW=m
-CONFIG_NF_NAT_IPV6=m
-CONFIG_IP6_NF_TARGET_MASQUERADE=m
-CONFIG_IP6_NF_TARGET_NPT=m
-CONFIG_IP_SCTP=m
-CONFIG_BRIDGE=m
-CONFIG_CFG80211=m
-CONFIG_MAC80211=m
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FW_LOADER_USER_HELPER is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_FTL=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_FSL_ELBC=y
-CONFIG_MTD_NAND_FSL_IFC=y
-CONFIG_MTD_UBI=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_EEPROM_LEGACY=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_ATA=y
-CONFIG_SATA_AHCI=y
-CONFIG_SATA_FSL=y
-CONFIG_SATA_SIL24=y
-CONFIG_PATA_ALI=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=y
-CONFIG_MD_LINEAR=y
-CONFIG_MD_RAID0=y
-CONFIG_MD_RAID1=y
-CONFIG_MD_RAID10=y
-CONFIG_MD_RAID456=y
-CONFIG_MD_MULTIPATH=y
-CONFIG_BCACHE=y
-CONFIG_BLK_DEV_DM=m
-CONFIG_DM_CRYPT=m
-CONFIG_DM_SNAPSHOT=m
-CONFIG_DM_THIN_PROVISIONING=m
-CONFIG_DM_CACHE=m
-CONFIG_DM_MIRROR=m
-CONFIG_DM_RAID=m
-CONFIG_DM_ZERO=m
-CONFIG_DM_MULTIPATH=m
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_TUN=y
-CONFIG_NET_TULIP=y
-CONFIG_GIANFAR=y
-CONFIG_E1000E=y
-CONFIG_AT803X_PHY=y
-CONFIG_ATHEROS_PHY=y
-CONFIG_MARVELL_PHY=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_CICADA_PHY=y
-CONFIG_VITESSE_PHY=y
-CONFIG_DP8384x_PHY=y
-CONFIG_FIXED_PHY=y
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_MPPE=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPPOE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_ATH_CARDS=m
-CONFIG_ATH9K=m
-CONFIG_ATH9K_HTC=m
-CONFIG_RT2X00=m
-CONFIG_RT2800PCI=m
-CONFIG_RT73USB=m
-CONFIG_RT2800USB=m
-CONFIG_RT2800USB_RT3573=y
-CONFIG_RT2800USB_RT53XX=y
-CONFIG_RT2800USB_RT55XX=y
-# CONFIG_RTL_CARDS is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_DETECT_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_NVRAM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MPC=y
-CONFIG_SPI=y
-CONFIG_SPI_FSL_SPI=y
-CONFIG_SPI_FSL_ESPI=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_MPC8XXX=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_ARB is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_HRTIMER=m
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_DRIVERS is not set
-CONFIG_SND_INTEL8X0=m
-# CONFIG_SND_PPC is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-# CONFIG_HID_GENERIC is not set
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_FSL=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
-CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
-CONFIG_USB_STORAGE=y
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_OF_ESDHC=y
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_CMOS=y
-CONFIG_DMADEVICES=y
-CONFIG_FSL_DMA=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_FANOTIFY=y
-CONFIG_FUSE_FS=m
-CONFIG_VFAT_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_HUGETLBFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_UBIFS_FS=y
-CONFIG_SQUASHFS=y
-CONFIG_SQUASHFS_XATTR=y
-CONFIG_SQUASHFS_LZO=y
-CONFIG_SQUASHFS_XZ=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_CIFS=m
-CONFIG_CIFS_XATTR=y
-CONFIG_CIFS_POSIX=y
-# CONFIG_CIFS_DEBUG is not set
-CONFIG_CIFS_SMB2=y
-CONFIG_CIFS_FSCACHE=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=m
-CONFIG_CRC_T10DIF=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_TALITOS=y
--- a/bsp/buildroot/board/freescale/p2020ds/linux-fix-c6187597-breakage.patch
+++ b/bsp/buildroot/board/freescale/p2020ds/linux-fix-c6187597-breakage.patch
@@ -1,51 +0,0 @@
-From: Nikita Yushchenko <nyushchenko@dev.rtsoft.ru>
-Subject: [PATCH] usb: pci-quirks: do not access OHCI_FMINTERVAL register on ULI hw
-
-This access causes hang on Freescale P2020DS board (that has OHCI
-provided by ULI 1533 chip).
-
-Since preserving OHCI_FMINTERVAL was originally done only for NVIDIA
-hardware and only later (in c6187597) was turned unconditional, and
-c6187597 commit message again mentions only NVIDIA, I think it should be
-safe to disable preserving OHCI_FMINTERVAL if device vendor is ULI.
-
-Signed-off-by: Nikita Yushchenko <nyushchenko@dev.rtsoft.ru>
---
- drivers/usb/host/pci-quirks.c |    8 +++++---
- 1 file changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
-index 00661d3..5acbd5b 100644
--- a/drivers/usb/host/pci-quirks.c
-+++ b/drivers/usb/host/pci-quirks.c
-@@ -571,7 +571,7 @@ static void quirk_usb_handoff_ohci(struct pci_dev *pdev)
- {
- 	void __iomem *base;
- 	u32 control;
-	u32 fminterval;
-+	u32 uninitialized_var(fminterval);
- 	int cnt;
- 
- 	if (!mmio_resource_enabled(pdev, 0))
-@@ -619,7 +619,8 @@ static void quirk_usb_handoff_ohci(struct pci_dev *pdev)
- 	}
- 
- 	/* software reset of the controller, preserving HcFmInterval */
-	fminterval = readl(base + OHCI_FMINTERVAL);
-+	if (pdev->vendor != PCI_VENDOR_ID_AL)
-+		fminterval = readl(base + OHCI_FMINTERVAL);
- 	writel(OHCI_HCR, base + OHCI_CMDSTATUS);
- 
- 	/* reset requires max 10 us delay */
-@@ -628,7 +629,8 @@ static void quirk_usb_handoff_ohci(struct pci_dev *pdev)
- 			break;
- 		udelay(1);
- 	}
-	writel(fminterval, base + OHCI_FMINTERVAL);
-+	if (pdev->vendor != PCI_VENDOR_ID_AL)
-+		writel(fminterval, base + OHCI_FMINTERVAL);
- 
- 	/* Now the controller is safely in SUSPEND and nothing can wake it up */
- 	iounmap(base);
-- 
-1.7.10.4
--- a/bsp/buildroot/board/freescale/p2020ds/readme.txt
+++ b/bsp/buildroot/board/freescale/p2020ds/readme.txt
@@ -1,40 +0,0 @@
-You'll need to program the files created by buildroot into the flash.
-The fast way is to tftp transfer the files via one of the network interfaces.
-
-Alternatively you can transfer the files via serial console with an Ymodem
-file transfer from your terminal program by using a "loady" command
-from the u-boot prompt instead of the "tftp ..." commands stated below.
-Beware that serial console file transfers are quite slow!
-
-1. Program the DTB to NOR flash
-
-   => tftp ${loadaddr} p2020ds.dtb
-   => erase 0xeff00000 0xeff7ffff
-   => cp.b ${loadaddr} 0xeff00000 ${filesize}
-
-2. Program the kernel to NOR flash
-
-   => tftp ${loadaddr} uImage
-   => erase 0xec000000 0xec3fffff
-   => cp.b ${loadaddr} 0xec000000 ${filesize}
-
-3. Program the root filesystem to NOR flash
-
-   => tftp ${loadaddr} rootfs.jffs2
-   => erase 0xec400000 0xeeffffff
-   => cp.b ${loadaddr} 0xec400000 ${filesize}
-
-4. Booting your new system
-
-   => setenv jffs2boot 'setenv bootargs root=/dev/mtdblock4 rootfstype=jffs2 rw console=ttyS0,115200;bootm ec000000 - eff00000'
-
-   If you want to set this boot option as default:
-
-   => setenv bootcmd 'run jffs2boot'
-   => saveenv
-
-   ...or for a single boot:
-
-   => run jffs2boot
-
-   You can login with user "root".
--- a/bsp/buildroot/board/freescale/warpboard/genimage.cfg
+++ b/bsp/buildroot/board/freescale/warpboard/genimage.cfg
@@ -1,41 +0,0 @@
-# Minimal SD card image for the Warp board
-#
-# We mimic the .sdcard Freescale's image format for i.MX6SL:
-# * the microSD card must have 1 kB free space at the beginning,
-# * U-Boot is dumped as is,
-# * a FAT partition at offset 8 MB is containing zImage and dtbs,
-# * a single root filesystem partition is required (Ext4 in this case).
-#
-
-image boot.vfat {
-  vfat {
-    files = {
-      "imx6sl-warp.dtb",
-      "zImage"
-    }
-  }
-  size = 16M
-}
-
-image sdcard.img {
-  hdimage {
-  }
-
-  partition u-boot {
-    in-partition-table = "no"
-    image = "u-boot.imx"
-    offset = 1024
-  }
-
-  partition boot {
-    partition-type = 0xC
-    bootable = "true"
-    image = "boot.vfat"
-    offset = 8M
-  }
-
-  partition rootfs {
-    partition-type = 0x83
-    image = "rootfs.ext4"
-  }
-}
--- a/bsp/buildroot/board/grinn/chiliboard/genimage.cfg
+++ b/bsp/buildroot/board/grinn/chiliboard/genimage.cfg
@@ -0,0 +1,31 @@
+# Minimal microSD card image for Grinn's chiliBoard
+#
+
+image boot.vfat {
+  vfat {
+    files = {
+      "MLO",
+      "u-boot.img",
+      "am335x-chiliboard.dtb",
+      "zImage"
+    }
+  }
+  size = 16M
+}
+
+image sdcard.img {
+  hdimage {
+  }
+
+  partition u-boot {
+    partition-type = 0xC
+    bootable = "true"
+    image = "boot.vfat"
+    offset = 1M
+  }
+
+  partition rootfs {
+    partition-type = 0x83
+    image = "rootfs.ext4"
+  }
+}
--- a/bsp/buildroot/board/grinn/chiliboard/post-image.sh
+++ b/bsp/buildroot/board/grinn/chiliboard/post-image.sh
@@ -0,0 +1,14 @@
+#!/usr/bin/env bash
+
+BOARD_DIR="$(dirname $0)"
+GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
+GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
+
+rm -rf "${GENIMAGE_TMP}"
+
+genimage \
+    --rootpath "${TARGET_DIR}" \
+    --tmppath "${GENIMAGE_TMP}" \
+    --inputpath "${BINARIES_DIR}" \
+    --outputpath "${BINARIES_DIR}" \
+    --config "${GENIMAGE_CFG}"
--- a/bsp/buildroot/board/grinn/chiliboard/readme.txt
+++ b/bsp/buildroot/board/grinn/chiliboard/readme.txt
@@ -0,0 +1,46 @@
+**********
+chiliBoard
+**********
+
+Build
+=====
+
+First, configure Buildroot for your chiliBoard:
+
+  make grinn_chiliboard_defconfig
+
+Build image:
+
+  make
+
+After building you should get a tree like this:
+
+  output/images/
+  ├── am335x-chiliboard.dtb
+  ├── boot.vfat
+  ├── MLO
+  ├── rootfs.ext2
+  ├── rootfs.ext4
+  ├── rootfs.tar
+  ├── sdcard.img
+  ├── u-boot.img
+  └── zImage
+
+Create a bootable microSD card
+==============================
+
+Buildroot prepares a bootable microSD card image "sdcard.img" in output/images/
+directory, To flash SD card just run the following command:
+
+  sudo dd if=output/images/sdcard.img of=/dev/<sd_card> bs=1M
+
+where <sd_card> can be sdX or mmcblkX
+
+*** WARNING! This will destroy all contents of device you specify! ***
+
+Boot chiliBoard
+===============
+
+- insert the microSD card in the microSD slot of the board;
+- plug micro USB cable to provide power and console interface
+- use terminal emulator with 115200 bps, 8n1
--- a/bsp/buildroot/board/freescale/imx6ulevk/genimage.cfg
+++ b/bsp/buildroot/board/freescale/imx6ulevk/genimage.cfg
@@ -1,8 +1,9 @@
-# Minimal microSD card image for the Freescale's i.MX6UL EVK board
+# Minimal microSD card image for Grinn's liteBoard
 #
 # We mimic the .sdcard Freescale's image format for i.MX6UL:
 # * the microSD card must have 1 kB free space at the beginning,
-# * U-Boot is dumped as is,
+# * SPL is dumped as is,
+# * U-Boot is dumped at 69K offset, as configured in SPL
 # * a FAT partition at offset 8 MB is containing zImage and dtbs,
 # * a single root filesystem partition is required (Ext4 in this case).
 #
@@ -10,7 +11,7 @@
 image boot.vfat {
  vfat {
    files = {
-      "imx6ul-14x14-evk.dtb",
+      "imx6ul-liteboard.dtb",
      "zImage"
    }
  }
@@ -21,10 +22,16 @@ image sdcard.img {
  hdimage {
  }

+  partition SPL {
+    in-partition-table = "no"
+    image = "SPL"
+    offset = 1K
+  }
+
  partition u-boot {
    in-partition-table = "no"
-    image = "u-boot.imx"
-    offset = 1024
+    image = "u-boot.img"
+    offset = 69K
  }

  partition boot {
--- a/bsp/buildroot/board/grinn/liteboard/patches/linux/0001-ARM-dts-imx6ul-Add-DTS-for-liteSOM-module.patch
+++ b/bsp/buildroot/board/grinn/liteboard/patches/linux/0001-ARM-dts-imx6ul-Add-DTS-for-liteSOM-module.patch
@@ -0,0 +1,113 @@
+From 8cbabc57257bdbf5f1cf039a265c875da8ddc2e9 Mon Sep 17 00:00:00 2001
+From: Marcin Niestroj <m.niestroj@grinn-global.com>
+Date: Fri, 21 Oct 2016 17:07:16 +0200
+Subject: [PATCH 1/2] ARM: dts: imx6ul: Add DTS for liteSOM module
+
+This is a SOM (System on Module), so it will be part of another boards.
+Hence, this is a "dtsi" file that will be included from another device
+tree files.
+
+Hardware specification:
+ * Freescale i.MX6UL SoC
+ * up to 512 MB RAM
+ * eMMC on uSDHC2
+
+Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
+Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+---
+ arch/arm/boot/dts/imx6ul-litesom.dtsi | 82 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 82 insertions(+)
+ create mode 100644 arch/arm/boot/dts/imx6ul-litesom.dtsi
+
+diff --git a/arch/arm/boot/dts/imx6ul-litesom.dtsi b/arch/arm/boot/dts/imx6ul-litesom.dtsi
+new file mode 100644
+index 000000000000..461292d33417
+--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-litesom.dtsi
+@@ -0,0 +1,82 @@
+/*
+ * Copyright 2016 Grinn
+ *
+ * Author: Marcin Niestroj <m.niestroj@grinn-global.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "imx6ul.dtsi"
+
+/ {
+	model = "Grinn i.MX6UL liteSOM";
+	compatible = "grinn,imx6ul-litesom", "fsl,imx6ul";
+
+	memory {
+		reg = <0x80000000 0x20000000>;
+	};
+};
+
+&iomuxc {
+	pinctrl_usdhc2: usdhc2grp {
+		fsl,pins = <
+			MX6UL_PAD_NAND_RE_B__USDHC2_CLK	    0x10069
+			MX6UL_PAD_NAND_WE_B__USDHC2_CMD	    0x17059
+			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
+			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
+			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
+			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
+			MX6UL_PAD_NAND_ALE__USDHC2_RESET_B  0x17059
+		>;
+	};
+};
+
+&usdhc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc2>;
+	no-1-8-v;
+	non-removable;
+	keep-power-in-suspend;
+	wakeup-source;
+	bus-width = <8>;
+	status = "okay";
+};
+-- 
+2.11.0
+
--- a/bsp/buildroot/board/grinn/liteboard/patches/linux/0002-ARM-dts-imx6ul-Add-DTS-for-liteBoard.patch
+++ b/bsp/buildroot/board/grinn/liteboard/patches/linux/0002-ARM-dts-imx6ul-Add-DTS-for-liteBoard.patch
@@ -0,0 +1,190 @@
+From 35a8bca870bedebb9d37ad58b905863cba780f9f Mon Sep 17 00:00:00 2001
+From: Marcin Niestroj <m.niestroj@grinn-global.com>
+Date: Fri, 21 Oct 2016 17:07:17 +0200
+Subject: [PATCH 2/2] ARM: dts: imx6ul: Add DTS for liteBoard
+
+liteBoard is a development board which uses liteSOM as its base.
+
+Hardware specification:
+ * liteSOM (i.MX6UL, DRAM, eMMC)
+ * Ethernet PHY (id 0)
+ * USB host (usb_otg1)
+ * MicroSD slot (uSDHC1)
+
+Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
+Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+---
+ arch/arm/boot/dts/Makefile             |   1 +
+ arch/arm/boot/dts/imx6ul-liteboard.dts | 147 +++++++++++++++++++++++++++++++++
+ 2 files changed, 148 insertions(+)
+ create mode 100644 arch/arm/boot/dts/imx6ul-liteboard.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index c558ba75cbcc..a587ce231f83 100644
+--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
+@@ -420,6 +420,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
+ dtb-$(CONFIG_SOC_IMX6UL) += \
+ 	imx6ul-14x14-evk.dtb \
+ 	imx6ul-geam-kit.dtb \
+	imx6ul-liteboard.dtb \
+ 	imx6ul-pico-hobbit.dtb \
+ 	imx6ul-tx6ul-0010.dtb \
+ 	imx6ul-tx6ul-0011.dtb \
+diff --git a/arch/arm/boot/dts/imx6ul-liteboard.dts b/arch/arm/boot/dts/imx6ul-liteboard.dts
+new file mode 100644
+index 000000000000..6e04cb9202f4
+--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-liteboard.dts
+@@ -0,0 +1,147 @@
+/*
+ * Copyright 2016 Grinn
+ *
+ * Author: Marcin Niestroj <m.niestroj@grinn-global.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6ul-litesom.dtsi"
+
+/ {
+	model = "Grinn i.MX6UL liteBoard";
+	compatible = "grinn,imx6ul-liteboard", "grinn,imx6ul-litesom",
+		     "fsl,imx6ul";
+
+	chosen {
+		stdout-path = &uart1;
+	};
+
+	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usb_otg1_vbus>;
+		regulator-name = "usb_otg1_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio2 8 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&iomuxc {
+	pinctrl_enet1: enet1grp {
+		fsl,pins = <
+			MX6UL_PAD_GPIO1_IO07__ENET1_MDC		0x1b0b0
+			MX6UL_PAD_GPIO1_IO06__ENET1_MDIO	0x1b0b0
+			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0
+			MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	0x1b0b0
+			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0
+			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031
+		>;
+	};
+
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1
+			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1
+		>;
+	};
+
+	pinctrl_usdhc1: usdhc1grp {
+		fsl,pins = <
+			MX6UL_PAD_UART1_RTS_B__GPIO1_IO19	0x17059
+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059
+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10071
+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059
+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059
+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059
+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059
+		>;
+	};
+
+	pinctrl_usb_otg1_vbus: usb-otg1-vbus {
+		fsl,pins = <
+			MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	0x79
+		>;
+	};
+};
+
+&fec1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet1>;
+	phy-mode = "rmii";
+	phy-handle = <&ethphy0>;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy0: ethernet-phy@0 {
+			reg = <0>;
+		};
+	};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	status = "okay";
+};
+
+&usbotg1 {
+	vbus-supply = <&reg_usb_otg1_vbus>;
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usdhc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+	no-1-8-v;
+	keep-power-in-suspend;
+	wakeup-source;
+	status = "okay";
+};
+-- 
+2.11.0
+
--- a/bsp/buildroot/board/grinn/liteboard/post-image.sh
+++ b/bsp/buildroot/board/grinn/liteboard/post-image.sh
@@ -0,0 +1,14 @@
+#!/usr/bin/env bash
+
+BOARD_DIR="$(dirname $0)"
+GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
+GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
+
+rm -rf "${GENIMAGE_TMP}"
+
+genimage \
+    --rootpath "${TARGET_DIR}" \
+    --tmppath "${GENIMAGE_TMP}" \
+    --inputpath "${BINARIES_DIR}" \
+    --outputpath "${BINARIES_DIR}" \
+    --config "${GENIMAGE_CFG}"
--- a/bsp/buildroot/board/grinn/liteboard/readme.txt
+++ b/bsp/buildroot/board/grinn/liteboard/readme.txt
@@ -0,0 +1,45 @@
+*********
+liteBoard
+*********
+
+Build
+=====
+
+First, configure Buildroot for your liteBoard:
+
+  make grinn_liteboard_defconfig
+
+Build image:
+
+  make
+
+After building you should get a tree like this:
+
+  output/images/
+  ├── boot.vfat
+  ├── imx6ul-liteboard.dtb
+  ├── rootfs.ext2
+  ├── rootfs.ext4
+  ├── rootfs.tar
+  ├── sdcard.img
+  ├── u-boot.imx
+  └── zImage
+
+Create a bootable microSD card
+==============================
+
+Buildroot prepares a bootable microSD card image "sdcard.img" in output/images/
+directory, To flash SD card just run the following command:
+
+  sudo dd if=output/images/sdcard.img of=/dev/<sd_card> bs=1M
+
+where <sd_card> can be sdX or mmcblkX
+
+*** WARNING! This will destroy all contents of device you specify! ***
+
+Boot liteBoard
+==============
+
+- insert the microSD card in the microSD slot of the board;
+- plug micro USB cable to provide power and console interface
+- use terminal emulator with 115200 bps, 8n1
--- a/bsp/buildroot/board/hardkernel/odroidc2/boot.ini
+++ b/bsp/buildroot/board/hardkernel/odroidc2/boot.ini
@@ -1,42 +1,169 @@
 ODROIDC2-UBOOT-CONFIG

-# HDMI mode
+########################################################################
+# Changes made to this are overwritten every time there's a new upgrade
+# To make your changes permanent change it on 
+# boot.ini.default
+# After changing it on boot.ini.default run the bootini command to
+# rewrite this file with your personal permanent settings.
+# Documentation: http://odroid.com/dokuwiki/doku.php?id=en:c2_persistent_bootini
+########################################################################
+
+# Possible screen resolutions
+# Uncomment only a single Line! The line with setenv written.
+# At least one mode must be selected.
+
+# Custom modeline!
+# To use custom modeline you need to disable all the below resolutions
+# and setup your own! 
+# For more information check our wiki: 
+# http://odroid.com/dokuwiki/doku.php?id=en:c2_hdmi_autosetting
+# Example below:
+# setenv m "custombuilt" 
+# setenv modeline "1920,1200,154000,74040,60,1920,1968,2000,2080,1200,1202,1208,1235,1,0,1"
+
+# 480 Lines (720x480)
+# setenv m "480i60hz" # Interlaced 60Hz
+# setenv m "480i_rpt" # Interlaced for Rear Projection Televisions 60Hz
+# setenv m "480p60hz" # 480 Progressive 60Hz
+# setenv m "480p_rpt" # 480 Progressive for Rear Projection Televisions 60Hz
+
+# 576 Lines (720x576)
+# setenv m "576i50hz" # Interlaced 50Hz
+# setenv m "576i_rpt" # Interlaced for Rear Projection Televisions 50Hz
+# setenv m "576p50hz" # Progressive 50Hz
+# setenv m "576p_rpt" # Progressive for Rear Projection Televisions 50Hz
+
+# 720 Lines (1280x720)
+# setenv m "720p50hz" # 50Hz
+# setenv m "720p60hz" # 60Hz
+
+# 1080 Lines (1920x1080)
+# setenv m "1080i60hz" # Interlaced 60Hz
 setenv m "1080p60hz" # Progressive 60Hz
+# setenv m "1080i50hz" # Interlaced 50Hz
+# setenv m "1080p50hz" # Progressive 50Hz
+# setenv m "1080p24hz" # Progressive 24Hz
+
+# 4K (3840x2160)
+# setenv m "2160p30hz"    # Progressive 30Hz
+# setenv m "2160p25hz"    # Progressive 25Hz
+# setenv m "2160p24hz"    # Progressive 24Hz
+# setenv m "smpte24hz"    # Progressive 24Hz SMPTE
+# setenv m "2160p50hz"    # Progressive 50Hz
+# setenv m "2160p60hz"    # Progressive 60Hz
+# setenv m "2160p50hz420" # Progressive 50Hz with YCbCr 4:2:0 (Requires TV/Monitor that supports it)
+# setenv m "2160p60hz420" # Progressive 60Hz with YCbCr 4:2:0 (Requires TV/Monitor that supports it)
+
+### VESA modes ###
+# setenv m "640x480p60hz"
+# setenv m "800x480p60hz"
+# setenv m "480x800p60hz"
+# setenv m "800x600p60hz"
+# setenv m "1024x600p60hz"
+# setenv m "1024x768p60hz"  
+# setenv m "1280x800p60hz"
+# setenv m "1280x1024p60hz"
+# setenv m "1360x768p60hz"
+# setenv m "1440x900p60hz"
+# setenv m "1600x900p60hz"
+# setenv m "1680x1050p60hz"
+# setenv m "1600x1200p60hz"
+# setenv m "1920x1200p60hz"
+# setenv m "2560x1080p60hz"
+# setenv m "2560x1440p60hz"
+# setenv m "2560x1600p60hz"
+# setenv m "3440x1440p60hz"

 # HDMI BPP Mode
 setenv m_bpp "32"
+# setenv m_bpp "24"
+# setenv m_bpp "16"
+
+# HDMI DVI/VGA modes
+# By default its set to HDMI, if needed change below.
+# Uncomment only a single Line.
+# setenv vout "dvi"
+# setenv vout "vga"

 # HDMI HotPlug Detection control
 # Allows you to force HDMI thinking that the cable is connected.
 # true = HDMI will believe that cable is always connected
 # false = will let board/monitor negotiate the connection status
 setenv hpd "true"
+# setenv hpd "false"

-# Default Console Device Setting
-setenv condev "console=ttyS0,115200n8 console=tty0"   # on both
-
-# Meson Timer
-# 1 - Meson Timer
-# 0 - Arch Timer
-# Using meson_timer improves the video playback whoever it breaks KVM (virtualization).
-# Using arch timer allows KVM/Virtualization to work however you'll experience poor video
-setenv mesontimer "1"
+# Monitor output
+# Controls if HDMI PHY should output anything to the monitor
+setenv monitor_onoff "false" # true or false

 # Server Mode (aka. No Graphics)
 # Setting nographics to 1 will disable all video subsystem
 # This mode is ideal of server type usage. (Saves ~300Mb of RAM)
 setenv nographics "0"

+# Meson Timer
+# 1 - Meson Timer
+# 0 - Arch Timer 
+# Using meson_timer improves the video playback however it breaks KVM (virtualization).
+# Using arch timer allows KVM/Virtualization to work however you'll experience poor video
+setenv mesontimer "1"
+
+# UHS (Ultra High Speed) MicroSD mode enable/disable
+setenv disableuhs "false"
+
+# MicroSD Card Detection enable/disable
+# Force the MMC controlled to believe that a card is connected.
+setenv mmc_removable "true"
+
+# USB Multi WebCam tweak
+# Only enable this if you use it.
+setenv usbmulticam "false"
+
+# Default Console Device Setting
+setenv condev "console=ttyS0,115200n8 console=tty0"   # on both
+
+# CPU Frequency / Cores control
+###########################################
+### WARNING!!! WARNING!!! WARNING!!!
+# Before changing anything here please read the wiki entry: 
+# http://odroid.com/dokuwiki/doku.php?id=en:c2_set_cpu_freq
+#
+# MAX CPU's
+# setenv maxcpus "1"
+# setenv maxcpus "2"
+# setenv maxcpus "3"
+setenv maxcpus "4"
+
+# MAX Frequency
+# setenv max_freq "2016"  # 2.016GHz
+# setenv max_freq "1944"  # 1.944GHz
+# setenv max_freq "1944"  # 1.944GHz
+# setenv max_freq "1920"  # 1.920GHz
+# setenv max_freq "1896"  # 1.896GHz
+# setenv max_freq "1752"  # 1.752GHz
+# setenv max_freq "1680"  # 1.680GHz
+# setenv max_freq "1656"  # 1.656GHz
+setenv max_freq "1536"  # 1.536GHz
+
+
+
 ###########################################

 # Boot Arguments
-setenv bootargs "root=/dev/mmcblk0p2 rootwait ro ${condev} no_console_suspend hdmimode=${m} m_bpp=${m_bpp} vout=${vout} fsck.repair=yes net.ifnames=0 elevator=noop disablehpd=${hpd}"
+if test "${m}" = "custombuilt"; then setenv cmode "modeline=${modeline}"; fi
+
+setenv bootargs "root=/dev/mmcblk0p2 rootwait ro ${condev} no_console_suspend hdmimode=${m} ${cmode} m_bpp=${m_bpp} vout=${vout} fsck.repair=yes net.ifnames=0 elevator=noop disablehpd=${hpd} max_freq=${max_freq} maxcpus=${maxcpus} monitor_onoff=${monitor_onoff} disableuhs=${disableuhs} mmc_removable=${mmc_removable} usbmulticam=${usbmulticam}"
+
+# Booting

-# Load Images
 setenv loadaddr "0x11000000"
-setenv dtb_loadaddr "0x10000000"
+setenv dtb_loadaddr "0x1000000"
+setenv initrd_loadaddr "0x13000000"
+
 fatload mmc 0:1 ${loadaddr} Image
 fatload mmc 0:1 ${dtb_loadaddr} meson64_odroidc2.dtb
+fdt addr ${dtb_loadaddr}

 if test "${mesontimer}" = "0"; then fdt rm /meson_timer; fdt rm /cpus/cpu@0/timer; fdt rm /cpus/cpu@1/timer; fdt rm /cpus/cpu@2/timer; fdt rm /cpus/cpu@3/timer; fi
 if test "${mesontimer}" = "1"; then fdt rm /timer; fi
@@ -46,5 +173,4 @@ if test "${nographics}" = "1"; then fdt rm /meson-fb; fdt rm /amhdmitx; fdt rm /
 if test "${nographics}" = "1"; then fdt rm /meson-vout; fdt rm /mesonstream; fdt rm /meson-fb; fi
 if test "${nographics}" = "1"; then fdt rm /deinterlace; fdt rm /codec_mm; fi

-# Booting
 booti ${loadaddr} - ${dtb_loadaddr}
--- a/bsp/buildroot/board/intel/galileo/linux-3.14.config
+++ b/bsp/buildroot/board/intel/galileo/linux-3.14.config
@@ -1,9 +1,9 @@
-CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_KERNEL_LZMA=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_FHANDLE=y
+CONFIG_KERNEL_LZMA=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BSD_PROCESS_ACCT=y
@@ -22,7 +22,6 @@ CONFIG_BLK_DEV_INITRD=y
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
 CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS_ALL=y
 # CONFIG_PCSPKR_PLATFORM is not set
 CONFIG_EMBEDDED=y
 # CONFIG_COMPAT_BRK is not set
@@ -32,16 +31,15 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_LBDAF is not set
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_BSD_DISKLABEL=y
-# CONFIG_EFI_PARTITION is not set
 # CONFIG_ZONE_DMA is not set
-CONFIG_INTEL_QUARK_X1000_SOC=y
+CONFIG_X86_INTEL_QUARK=y
 CONFIG_M586TSC=y
 CONFIG_X86_GENERIC=y
 CONFIG_HPET_TIMER=y
 CONFIG_PREEMPT_VOLUNTARY=y
-CONFIG_X86_UP_APIC=y
 CONFIG_X86_UP_IOAPIC=y
 # CONFIG_X86_MCE_AMD is not set
+# CONFIG_X86_16BIT is not set
 CONFIG_X86_REBOOTFIXUPS=y
 CONFIG_MICROCODE=y
 CONFIG_X86_MSR=y
@@ -56,7 +54,7 @@ CONFIG_EFI_CAPSULE=m
 CONFIG_HZ_100=y
 CONFIG_KEXEC=y
 CONFIG_PHYSICAL_START=0x400000
-# CONFIG_RELOCATABLE is not set
+CONFIG_PHYSICAL_ALIGN=0x1000000
 # CONFIG_COMPAT_VDSO is not set
 CONFIG_PM_RUNTIME=y
 CONFIG_PM_DEBUG=y
@@ -64,7 +62,6 @@ CONFIG_PM_TRACE_RTC=y
 CONFIG_ACPI_PROCFS=y
 CONFIG_ACPI_PROCFS_POWER=y
 CONFIG_ACPI_EC_DEBUGFS=y
-# CONFIG_ACPI_PROC_EVENT is not set
 # CONFIG_ACPI_BATTERY is not set
 # CONFIG_ACPI_FAN is not set
 CONFIG_ACPI_DEBUG=y
@@ -79,11 +76,12 @@ CONFIG_UNIX=y
 CONFIG_INET=y
 CONFIG_SYN_COOKIES=y
 # CONFIG_IPV6_SIT is not set
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
 CONFIG_VLAN_8021Q=m
 CONFIG_VLAN_8021Q_GVRP=y
 CONFIG_CAN=m
-CONFIG_CAN_RAW=m
-CONFIG_CAN_BCM=m
+# CONFIG_CAN_GW is not set
 CONFIG_CAN_J1939=m
 CONFIG_CAN_VCAN=m
 CONFIG_CAN_SLCAN=m
@@ -96,20 +94,18 @@ CONFIG_BT_BNEP_MC_FILTER=y
 CONFIG_BT_BNEP_PROTO_FILTER=y
 CONFIG_BT_HIDP=m
 CONFIG_BT_HCIBTUSB=m
-CONFIG_BT_HCIVHCI=m
 CONFIG_CFG80211=m
 CONFIG_CFG80211_WEXT=y
 CONFIG_MAC80211=m
+CONFIG_MAC80211_LEDS=y
 CONFIG_RFKILL=m
 CONFIG_RFKILL_INPUT=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_FW_LOADER_USER_HELPER is not set
 CONFIG_DEBUG_DEVRES=y
 CONFIG_MTD=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_M25P80=y
+CONFIG_MTD_BLOCK=m
 # CONFIG_PNP_DEBUG_MESSAGES is not set
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_LOOP_MIN_COUNT=2
@@ -117,6 +113,7 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=1
 CONFIG_BLK_DEV_RAM_SIZE=81920
 CONFIG_EEPROM_AT24=m
+CONFIG_EEPROM_93CX6=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_SG=y
@@ -124,10 +121,12 @@ CONFIG_SCSI_CONSTANTS=y
 CONFIG_SCSI_SPI_ATTRS=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
+CONFIG_TUN=y
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_NET_VENDOR_ADAPTEC is not set
 # CONFIG_NET_VENDOR_ALTEON is not set
 # CONFIG_NET_VENDOR_AMD is not set
+# CONFIG_NET_VENDOR_ARC is not set
 # CONFIG_NET_VENDOR_ATHEROS is not set
 # CONFIG_NET_VENDOR_BROADCOM is not set
 # CONFIG_NET_VENDOR_BROCADE is not set
@@ -138,7 +137,6 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_VENDOR_EMULEX is not set
 # CONFIG_NET_VENDOR_EXAR is not set
 # CONFIG_NET_VENDOR_HP is not set
-CONFIG_E1000=m
 # CONFIG_NET_VENDOR_I825XX is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 # CONFIG_NET_VENDOR_MELLANOX is not set
@@ -156,19 +154,19 @@ CONFIG_E1000=m
 # CONFIG_NET_VENDOR_SILAN is not set
 # CONFIG_NET_VENDOR_SIS is not set
 # CONFIG_NET_VENDOR_SMSC is not set
-CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_ETH=m
 # CONFIG_STMMAC_PLATFORM is not set
-CONFIG_STMMAC_PCI=y
-CONFIG_STMMAC_DA=y
+CONFIG_STMMAC_PCI=m
 # CONFIG_NET_VENDOR_SUN is not set
 # CONFIG_NET_VENDOR_TEHUTI is not set
 # CONFIG_NET_VENDOR_TI is not set
 # CONFIG_NET_VENDOR_VIA is not set
 # CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_PHYLIB=y
 CONFIG_PPP=m
 CONFIG_PPP_DEFLATE=m
 CONFIG_PPP_ASYNC=m
-CONFIG_IWLWIFI=m
+# CONFIG_RTL_CARDS is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=m
 # CONFIG_INPUT_KEYBOARD is not set
@@ -189,41 +187,41 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_SERIAL_8250_DETECT_IRQ=y
 CONFIG_SERIAL_8250_RSA=y
 CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_SC16IS7XX=m
+CONFIG_SERIAL_SC16IS7XX_SPI=m
 # CONFIG_HW_RANDOM is not set
 CONFIG_HPET=y
 # CONFIG_HPET_MMAP is not set
-CONFIG_I2C_CHARDEV=y
+CONFIG_I2C=y
 CONFIG_SPI_DEBUG=y
 CONFIG_SPI_GPIO=y
 CONFIG_SPI_PXA2XX=y
-CONFIG_SPI_PXA2XX_PCI=y
-CONFIG_SPI_SPIDEV=y
-CONFIG_PTP_1588_CLOCK_PCH=m
-CONFIG_GPIO_SCH=m
-CONFIG_GPIO_PCA953X=m
+CONFIG_PTP_1588_CLOCK=y
+CONFIG_GPIO_SCH=y
+CONFIG_GPIO_PCA953X=y
 CONFIG_GPIO_PCA953X_IRQ=y
-# CONFIG_HWMON is not set
+CONFIG_GPIO_PCF857X=y
+CONFIG_HWMON=m
+CONFIG_SENSORS_LM75=m
+# CONFIG_X86_PKG_TEMP_THERMAL is not set
 CONFIG_MFD_INTEL_QUARK_HSUART_DMA=y
 CONFIG_CY8C9540A=m
 CONFIG_MFD_PCA9685=m
 CONFIG_INTEL_QRK_GIP=m
 CONFIG_INTEL_QRK_GIP_TEST=m
-CONFIG_LPC_SCH=y
 CONFIG_MEDIA_SUPPORT=m
 CONFIG_MEDIA_CAMERA_SUPPORT=y
 CONFIG_MEDIA_USB_SUPPORT=y
 CONFIG_USB_VIDEO_CLASS=m
 # CONFIG_USB_GSPCA is not set
 # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
-# CONFIG_DVB_AU8522_V4L is not set
-# CONFIG_DVB_TUNER_DIB0070 is not set
-# CONFIG_DVB_TUNER_DIB0090 is not set
 # CONFIG_VGA_ARB is not set
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_SOUND=m
 CONFIG_SND=m
 CONFIG_SND_USB_AUDIO=m
 CONFIG_USB=m
+# CONFIG_USB_DEFAULT_PERSIST is not set
 CONFIG_USB_EHCI_HCD=m
 CONFIG_USB_OHCI_HCD=m
 CONFIG_USB_UHCI_HCD=m
@@ -237,40 +235,44 @@ CONFIG_USB_EG20T=m
 CONFIG_USB_ZERO=m
 CONFIG_USB_ETH=m
 CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
+CONFIG_USB_G_SERIAL=y
 CONFIG_USB_G_ACM_MS=m
 CONFIG_MMC=y
 CONFIG_MMC_UNSAFE_RESUME=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PCI=y
-CONFIG_MMC_SDHCI_ACPI=y
 CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=m
 CONFIG_RTC_CLASS=y
+# CONFIG_RTC_SYSTOHC is not set
 CONFIG_DMADEVICES=y
 CONFIG_DW_DMAC=y
 CONFIG_UIO=y
 CONFIG_STAGING=y
-CONFIG_MAX78M6610_LMU=m
-CONFIG_IIO_SYSFS_TRIGGER=m
-CONFIG_IIO_HRTIMER_TRIGGER=m
-# CONFIG_NET_VENDOR_SILICOM is not set
-CONFIG_INTEL_QRK_ESRAM=y
 CONFIG_INTEL_QRK_THERMAL=y
 CONFIG_INTEL_QRK_AUDIO_CTRL=m
 CONFIG_INTEL_QRK_J1708=m
+CONFIG_INTEL_QRK_ESRAM=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_IIO=y
 CONFIG_IIO_BUFFER_CB=y
 CONFIG_IIO_LIS331DLH_INTEL_QRK=y
+CONFIG_IIO_ST_ACCEL_3AXIS=y
 CONFIG_AD7298=m
 CONFIG_ADC1x8S102=m
+CONFIG_IIO_SYSFS_TRIGGER=m
+CONFIG_IIO_HRTIMER_TRIGGER=m
 CONFIG_PWM=y
-CONFIG_EFI_VARS=m
 CONFIG_DMI_SYSFS=y
+CONFIG_EFI_VARS=m
+# CONFIG_EFI_RUNTIME_MAP is not set
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
 CONFIG_EXT4_FS=y
-# CONFIG_EXT4_USE_FOR_EXT23 is not set
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
 CONFIG_VFAT_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
@@ -285,23 +287,22 @@ CONFIG_NLS_ISO8859_1=y
 CONFIG_PRINTK_TIME=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
 CONFIG_FRAME_WARN=2048
-CONFIG_MAGIC_SYSRQ=y
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_HEADERS_CHECK=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_TIMER_STATS=y
+CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_MEMORY_INIT=y
-# CONFIG_FTRACE is not set
 CONFIG_DEBUG_STACKOVERFLOW=y
+CONFIG_TIMER_STATS=y
+CONFIG_LATENCYTOP=y
+# CONFIG_FTRACE is not set
 CONFIG_X86_PTDUMP=y
 # CONFIG_DEBUG_RODATA_TEST is not set
 CONFIG_DEBUG_SET_MODULE_RONX=y
 # CONFIG_DOUBLEFAULT is not set
-CONFIG_DEBUG_BOOT_PARAMS=y
 CONFIG_OPTIMIZE_INLINING=y
 CONFIG_KEYS=y
 CONFIG_KEYS_DEBUG_PROC_KEYS=y
 CONFIG_SECURITY=y
 CONFIG_SECURITY_NETWORK=y
-# CONFIG_CRYPTO_HW is not set
 # CONFIG_VIRTUALIZATION is not set
+CONFIG_CRC_T10DIF=y
--- a/bsp/buildroot/board/lego/ev3/genimage.cfg
+++ b/bsp/buildroot/board/lego/ev3/genimage.cfg
@@ -0,0 +1,57 @@
+# LEGO MINDSTORMS EV3 can boot from a 16MB flash or from a microSD card.
+# The U-Boot bootloader from the flash is always used, even when booting
+# from a microSD card.
+
+# The Flash image
+
+flash nor-16M-256 {
+	pebsize = 4096
+	numpebs = 4096
+	minimum-io-unit-size = 256
+}
+
+image flash.bin {
+	flash {
+	}
+	flashtype = "nor-16M-256"
+	partition uboot {
+		image = "u-boot.bin"
+		size = 320K
+	}
+	partition uimage {
+		image = "uImage"
+		size = 3M
+		offset = 0x50000
+	}
+	partition rootfs {
+		image = "rootfs.squashfs"
+		size = 9600K
+		offset = 0x350000
+	}
+}
+
+# The SD card image
+
+image boot.vfat {
+	vfat {
+		files = {
+			"uImage"
+		}
+	}
+	size = 16M
+}
+
+image sdcard.img {
+	hdimage {
+	}
+	partition boot {
+		partition-type = 0xC
+		bootable = "true"
+		image = "boot.vfat"
+		offset = 4M
+	}
+	partition rootfs {
+		partition-type = 0x83
+		image = "rootfs.ext2"
+	}
+}
--- a/bsp/buildroot/board/lego/ev3/linux.fragment
+++ b/bsp/buildroot/board/lego/ev3/linux.fragment
@@ -0,0 +1,7 @@
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=32768
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_LZ4=y
+CONFIG_SQUASHFS_LZO=y
+CONFIG_SQUASHFS_XZ=y
--- a/bsp/buildroot/board/freescale/imx53loco/post-image.sh
+++ b/bsp/buildroot/board/freescale/imx53loco/post-image.sh
@@ -1,4 +1,4 @@
-#!/usr/bin/env bash
+#!/bin/sh

 BOARD_DIR="$(dirname $0)"
 GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
--- a/bsp/buildroot/board/lego/ev3/readme.txt
+++ b/bsp/buildroot/board/lego/ev3/readme.txt
@@ -4,8 +4,7 @@ Intro
 =====

 This is the buildroot basic board support for the Lego Mindstorms EV3
-programmable brick. No support for sensors and drivers is provided for the
-moment.
+programmable brick.

 The Lego Mindstorms EV3 brick comprises a Texas Instruments AM1808 SoC, with
 an ARM 926EJ-S main processor running at 300 MHz.
@@ -16,11 +15,9 @@ See:

 The buildroot configuration uses the Linux kernel of the ev3dev project.
 See:
- http://botbench.com/blog/2013/07/31/lego-mindstorms-ev3-source-code-available/
- https://github.com/mindboards/ev3sources
-
-Note that the EV3 configuration uses gcc 4.7, as the boot is broken with gcc
-4.8.
+- https://github.com/ev3dev/ev3-kernel/
+- https://github.com/ev3dev/lego-linux-drivers/
+- http://www.ev3dev.org/

 How it works
 ============
@@ -28,9 +25,13 @@ How it works
 Boot process :
 --------------

-The u-boot on-board the EV3 brick has provision to boot a Linux kernel from the
-external µSD card. It will try to load a uImage from the first µSD card
-partition, which must be formatted with a FAT filesystem.
+The EV3 boots from an EEPROM. This loads whatever is on the built-in 16MB flash
+(usually U-Boot) and runs it. The U-Boot from the official LEGO firmware and
+mainline U-Boot will attempt to boot a Linux kernel from the external µSD card.
+It will try to load a uImage (and optional boot.scr) from the first µSD card
+partition, which must be formatted with a FAT filesystem. If no µSD is found or
+it does not contain a uImage file, then the EV3 will boot the uImage from the
+built-in 16MB flash.

 How to build it
 ===============
@@ -57,75 +58,26 @@ Result of the build
 After building, you should obtain this tree:

    output/images/
+    ├── boot.vfat
+    ├── flash.bin
    ├── rootfs.ext2
    ├── rootfs.ext3 -> rootfs.ext2
+    ├── rootfs.squashfs
+    ├── sdcard.img
+    ├── u-boot.bin
    └── uImage

+Installation
+============

-Prepare your SDcard
-===================
-
-The following µSD card layout is recommended:
-
- First partition formated with a FAT filesystem, containing the uImage.
- Second partition formatted as ext2 or ext3, containing the root filesystem.
-
-Create the SDcard partition table
----------------------------------
-
-Determine the device associated to the SD card :
-
-  $ cat /proc/partitions
-
-Let's assume it is /dev/mmcblk0 :
-
-  $ sudo fdisk /dev/mmcblk0
-
-Delete all previous partitions by creating a new disklabel with 'o', then
-create the new partition table, using these options, pressing enter after each
-one:
-
-  * n p 1 2048 +10M t c
-  * n p 2 22528 +256M
-
-Using the 'p' option, the SD card's partition must look like this :
-
-Device          Boot  Start     End  Blocks  Id System
-/dev/mmcblk0p1         2048   22527   10240   c  W95 FAT32 (LBA)
-/dev/mmcblk0p2        22528  546815  262144  83  Linux
-
-Then write the partition table using 'w' and exit.
-
-Make partition one a DOS partition :
-
-  $ sudo mkfs.vfat /dev/mmcblk0p1
-
-Install the binaries to the SDcard
----------------------------------
-
-Remember your binaries are located in output/images/, go inside that directory :
-
-  $ cd output/images
-
-Copy the Linux kernel:
-
-  $ sudo mkdir /mnt/sdcard
-  $ sudo mount /dev/mmcblk0p1 /mnt/sdcard
-  $ sudo cp uImage /mnt/sdcard
-  $ sudo umount /mnt/sdcard
-
-Copy the rootfs :
-
-  $ sudo dd if=rootfs.ext3 of=/dev/mmcblk0p2 bs=1M
-  $ sync
-
-It's Done!
+You can use either flash.bin or the sdcard.img. To load flash.bin, use the
+official Lego Mindstorms EV3 programming software firmware update tool to load
+the image. To use sdcard.img, use a disk writing tool such as Etcher or dd to
+write the image to the µSD card.

 Finish
 ======

-Eject your µSD card, insert it in your Lego EV3, and power it up.
-
 To have a serial console, you will need a proper USB to Lego serial port
 adapter plugged into the EV3 sensors port 1.
 See:
--- a/bsp/buildroot/board/minnowboard/linux-4.8.config
+++ b/bsp/buildroot/board/minnowboard/linux-4.8.config
@@ -14,6 +14,7 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
+CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_SG=y
 CONFIG_ATA=y
 CONFIG_SATA_AHCI=y
@@ -45,7 +46,9 @@ CONFIG_SND_HDA_CODEC_HDMI=y
 # CONFIG_SND_SPI is not set
 # CONFIG_SND_USB is not set
 CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_STORAGE=y
 CONFIG_NOP_USB_XCEIV=y
 CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
--- a/bsp/buildroot/board/nanopi-neo/boot.cmd
+++ b/bsp/buildroot/board/nanopi-neo/boot.cmd
@@ -0,0 +1,8 @@
+setenv fdt_high ffffffff
+
+setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rootwait
+
+fatload mmc 0 $kernel_addr_r zImage
+fatload mmc 0 $fdt_addr_r sun8i-h3-nanopi-neo.dtb
+
+bootz $kernel_addr_r - $fdt_addr_r
--- a/bsp/buildroot/board/nanopi-neo/genimage.cfg
+++ b/bsp/buildroot/board/nanopi-neo/genimage.cfg
@@ -0,0 +1,34 @@
+image boot.vfat {
+	vfat {
+		files = {
+			"zImage",
+			"sun8i-h3-nanopi-neo.dtb",
+			"boot.scr"
+		}
+	}
+	size = 10M
+}
+
+image sdcard.img {
+	hdimage {
+	}
+
+	partition u-boot {
+		in-partition-table = "no"
+		image = "u-boot-sunxi-with-spl.bin"
+		offset = 8192
+		size = 1040384 # 1MB - 8192
+	}
+
+	partition boot {
+		partition-type = 0xC
+		bootable = "true"
+		image = "boot.vfat"
+	}
+
+	partition rootfs {
+		partition-type = 0x83
+		image = "rootfs.ext4"
+		size = 32M
+	}
+}
--- a/bsp/buildroot/board/nanopi-neo/post-build.sh
+++ b/bsp/buildroot/board/nanopi-neo/post-build.sh
@@ -0,0 +1,12 @@
+#!/bin/sh
+# post-build.sh for Nanopi NEO, based on the Orange Pi PC
+# 2013, Carlo Caione <carlo.caione@gmail.com>
+# 2016, "Yann E. MORIN" <yann.morin.1998@free.fr>
+
+BOARD_DIR="$( dirname "${0}" )"
+MKIMAGE="${HOST_DIR}/usr/bin/mkimage"
+BOOT_CMD="${BOARD_DIR}/boot.cmd"
+BOOT_CMD_H="${BINARIES_DIR}/boot.scr"
+
+# U-Boot script
+"${MKIMAGE}" -C none -A arm -T script -d "${BOOT_CMD}" "${BOOT_CMD_H}"
--- a/bsp/buildroot/board/nanopi-neo/post-image.sh
+++ b/bsp/buildroot/board/nanopi-neo/post-image.sh
@@ -0,0 +1,15 @@
+#!/bin/sh
+# post-image.sh for Nanopi NEO, based on the Orange Pi PC
+
+BOARD_DIR="$( dirname "${0}" )"
+GENIMAGE_CFG="${BOARD_DIR}/genimage.cfg"
+GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
+
+rm -rf "${GENIMAGE_TMP}"
+
+genimage                               \
+	--rootpath "${TARGET_DIR}"     \
+	--tmppath "${GENIMAGE_TMP}"    \
+	--inputpath "${BINARIES_DIR}"  \
+	--outputpath "${BINARIES_DIR}" \
+	--config "${GENIMAGE_CFG}"
--- a/bsp/buildroot/board/nanopi-neo/readme.txt
+++ b/bsp/buildroot/board/nanopi-neo/readme.txt
@@ -0,0 +1,43 @@
+Intro
+=====
+
+The instructions herein are valid for the FriendlyARM NanoPi NEO,
+both the 256MiB and 512MiB versions. They should also work the the
+NanoPi NEO Air, but this is untested so far.
+
+The FriendlyARM Nanopi NEO is a 4x4cm² board with an Allwiner H3 SoC:
+  - quad-core Cortex-A7 @1.2GHz
+  - 256 or 512MiB of DDR
+  - uSDCard as only storage option
+  - 3x USB 2.0 host (one socket, two on expansion pin-holes)
+  - 1x USB 2.0 OTG (also used as power source)
+  - 10/100 ethernet MAC
+  - GPIOs, SPI, I2c...
+
+Support for the Nanopi NEO in U-Boot and Linux is very recent, so
+much so that we have to use an -rc tag for U-Boot and a special
+Linux tree.
+
+Unfortunately, support for the ethernet MAC and the USB OTG are not
+yet upstream, but are being actively worked on.
+
+
+How to build
+============
+
+    $ make nanopi_neo_defconfig
+    $ make
+
+Note: you will need access to the internet to download the required
+sources.
+
+You will then obtain an image ready to be written to your micro SDcard:
+
+    $ dd if=output/images/sdcard.img of=/dev/sdX bs=1M
+
+Notes:
+  - replace 'sdX' with the actual device with your micro SDcard,
+  - you may need to be root to do that (use 'sudo').
+
+Insert the micro SDcard in your NanoPi NEO and power it up. The console
+is on the serial line, 115200 8N1.
--- a/bsp/buildroot/board/olimex/imx233_olinuxino/genimage-imx233_olinuxino.cfg
+++ b/bsp/buildroot/board/olimex/imx233_olinuxino/genimage-imx233_olinuxino.cfg
@@ -1,28 +0,0 @@
-image kernel.vfat {
-  vfat {
-    files = {
-      "uImage"
-    }
-  }
-  size = 5M
-}
-
-image sdcard.img {
-  hdimage {
-  }
-  partition boot {
-    	partition-type = 0x53
-    	image = "u-boot.sd"
-	size = 16M
-  }
-
-  partition kernel {
-    partition-type = 0xC
-    image = "kernel.vfat"
-  }
-
-  partition rootfs {
-    partition-type = 0x83
-    image = "rootfs.ext2"
-  }
-}
--- a/bsp/buildroot/board/olimex/imx233_olinuxino/linux-3.18.config
+++ b/bsp/buildroot/board/olimex/imx233_olinuxino/linux-3.18.config
@@ -1,152 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PERF_EVENTS=y
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_BLK_DEV_INTEGRITY=y
-# CONFIG_ARCH_MULTI_V7 is not set
-CONFIG_ARCH_MXS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_PREEMPT_VOLUNTARY=y
-CONFIG_AEABI=y
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="console=ttyAMA0,115200 root=/dev/mmcblk0p2 rw rootwait"
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_SYN_COOKIES=y
-CONFIG_CFG80211=y
-CONFIG_CFG80211_WEXT=y
-CONFIG_MAC80211=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-# CONFIG_FIRMWARE_IN_KERNEL is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_DATAFLASH=y
-CONFIG_MTD_SST25L=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_GPMI_NAND=y
-CONFIG_MTD_UBI=y
-# CONFIG_BLK_DEV is not set
-CONFIG_EEPROM_AT24=y
-CONFIG_EEPROM_93CX6=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_NETDEVICES=y
-# CONFIG_ETHERNET is not set
-CONFIG_USB_USBNET=y
-CONFIG_USB_NET_SMSC95XX=y
-CONFIG_RTL8187=m
-CONFIG_ATH_CARDS=m
-CONFIG_ATH9K_HTC=m
-CONFIG_RT2X00=m
-CONFIG_RT73USB=m
-CONFIG_RT2800USB=m
-CONFIG_RT2800USB_RT53XX=y
-CONFIG_RT2800USB_RT55XX=y
-CONFIG_RT2800USB_UNKNOWN=y
-CONFIG_RTL_CARDS=m
-CONFIG_RTL8192CU=m
-# CONFIG_RTLWIFI_DEBUG is not set
-CONFIG_ZD1211RW=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SERIAL_MXS_AUART=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_I2C_COMPAT is not set
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MXS=y
-CONFIG_SPI=y
-CONFIG_SPI_GPIO=m
-CONFIG_SPI_MXS=y
-CONFIG_PTP_1588_CLOCK=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_STMP3XXX_RTC_WATCHDOG=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_FB=y
-CONFIG_FB_MXS=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_HRTIMER=y
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_CHIPIDEA=y
-CONFIG_USB_CHIPIDEA_HOST=y
-CONFIG_USB_MXS_PHY=y
-CONFIG_MMC=y
-CONFIG_MMC_MXS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_STMP=y
-CONFIG_DMADEVICES=y
-CONFIG_MXS_DMA=y
-CONFIG_STAGING=y
-CONFIG_MXS_LRADC=y
-CONFIG_IIO=y
-CONFIG_IIO_SYSFS_TRIGGER=y
-CONFIG_PWM=y
-CONFIG_PWM_MXS=y
-CONFIG_EXT4_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_MISC_FILESYSTEMS is not set
-# CONFIG_NETWORK_FILESYSTEMS is not set
-CONFIG_PRINTK_TIME=y
-CONFIG_FRAME_WARN=2048
-CONFIG_UNUSED_SYMBOLS=y
-CONFIG_DEBUG_FS=y
-CONFIG_STRICT_DEVMEM=y
-CONFIG_DEBUG_USER=y
-CONFIG_KEYS=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_LZO=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_MXS_DCP=y
-CONFIG_CRC_CCITT=y
-CONFIG_CRC_ITU_T=y
-CONFIG_CRC7=m
-CONFIG_FONTS=y
--- a/bsp/buildroot/board/olimex/imx233_olinuxino/linux-wifi.fragment
+++ b/bsp/buildroot/board/olimex/imx233_olinuxino/linux-wifi.fragment
@@ -0,0 +1,18 @@
+# Network testing
+CONFIG_WIRELESS=y
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_MAC80211=y
+# MII PHY device drivers
+CONFIG_WLAN=y
+CONFIG_RTL8187=m
+CONFIG_ATH9K_HTC=m
+CONFIG_RT2X00=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_RT2800USB_RT55XX=y
+CONFIG_RT2800USB_UNKNOWN=y
+CONFIG_RTL_CARDS=m
+CONFIG_RTL8192CU=m
+CONFIG_ZD1211RW=m
--- a/Show More
+++ b/Show More