Bump buildroot to version 2017-02
TG-3 #closed
This commit is contained in:
jbnadal
@@ -1,137 +0,0 @@
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mips: replace addi with addiu
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ADDI instruction has been removed in R6 so let's use ADDIU instead.
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This patch has been sent upstream:
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https://bugs.kde.org/show_bug.cgi?id=356112
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Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
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Index: valgrind/coregrind/m_dispatch/dispatch-mips32-linux.S
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===================================================================
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--- valgrind/coregrind/m_dispatch/dispatch-mips32-linux.S (revision 15740)
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+++ valgrind/coregrind/m_dispatch/dispatch-mips32-linux.S (working copy)
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@@ -196,7 +196,7 @@
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addu $13, $13, $14
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lw $12, 0($13) /* t3 = VG_(tt_fast)[hash] :: ULong* */
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- addi $13, $13, 4
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+ addiu $13, $13, 4
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lw $25, 0($13) /* little-endian, so comparing 1st 32bit word */
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nop
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Index: valgrind/coregrind/m_dispatch/dispatch-mips64-linux.S
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===================================================================
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--- valgrind/coregrind/m_dispatch/dispatch-mips64-linux.S (revision 15740)
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+++ valgrind/coregrind/m_dispatch/dispatch-mips64-linux.S (working copy)
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@@ -196,7 +196,7 @@
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daddu $13, $13, $14
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ld $12, 0($13) /* t3 = VG_(tt_fast)[hash] :: ULong* */
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- daddi $13, $13, 8
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+ daddiu $13, $13, 8
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ld $25, 0($13) /* little-endian, so comparing 1st 32bit word */
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nop
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Index: valgrind/coregrind/m_libcsetjmp.c
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===================================================================
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--- valgrind/coregrind/m_libcsetjmp.c (revision 15740)
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+++ valgrind/coregrind/m_libcsetjmp.c (working copy)
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@@ -594,7 +594,7 @@
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/* Checking whether second argument is zero. */
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" bnez $a1, 1f \n\t"
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" nop \n\t"
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-" addi $a1, $a1, 1 \n\t" /* We must return 1 if val=0. */
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+" addiu $a1, $a1, 1 \n\t" /* We must return 1 if val=0. */
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"1: \n\t"
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" move $v0, $a1 \n\t" /* Return value of second argument. */
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" j $ra \n\t"
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Index: valgrind/coregrind/m_syswrap/syswrap-mips64-linux.c
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===================================================================
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--- valgrind/coregrind/m_syswrap/syswrap-mips64-linux.c (revision 15740)
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+++ valgrind/coregrind/m_syswrap/syswrap-mips64-linux.c (working copy)
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@@ -173,7 +173,7 @@
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" ld $30, 8($29)\n"
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" ld $28, 16($29)\n"
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" jr $31\n"
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-" daddi $29,$29, 32\n"
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+" daddiu $29,$29, 32\n"
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".previous\n"
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);
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Index: valgrind/coregrind/m_trampoline.S
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===================================================================
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--- valgrind/coregrind/m_trampoline.S (revision 15740)
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+++ valgrind/coregrind/m_trampoline.S (working copy)
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@@ -1254,8 +1254,8 @@
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//la $a0, string
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j strlen_cond
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strlen_loop:
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- addi $v0, $v0, 1
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- addi $a0, $a0, 1
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+ addiu $v0, $v0, 1
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+ addiu $a0, $a0, 1
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strlen_cond:
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lbu $t0, ($a0)
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bne $t0, $zero, strlen_loop
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Index: valgrind/helgrind/tests/tc08_hbl2.c
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===================================================================
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--- valgrind/helgrind/tests/tc08_hbl2.c (revision 15740)
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+++ valgrind/helgrind/tests/tc08_hbl2.c (working copy)
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@@ -125,11 +125,11 @@
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# define INC(_lval,_lqual) \
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__asm__ __volatile__ ( \
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"L1xyzzy1" _lqual":\n" \
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- " move $t0, %0\n" \
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- " ll $t1, 0($t0)\n" \
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- " addi $t1, $t1, 1\n" \
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- " sc $t1, 0($t0)\n" \
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- " beqz $t1, L1xyzzy1" _lqual \
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+ " move $t0, %0\n" \
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+ " ll $t1, 0($t0)\n" \
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+ " addiu $t1, $t1, 1\n" \
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+ " sc $t1, 0($t0)\n" \
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+ " beqz $t1, L1xyzzy1" _lqual \
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: /*out*/ : /*in*/ "r"(&(_lval)) \
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: /*trash*/ "t0", "t1", "memory" \
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)
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Index: valgrind/VEX/priv/guest_mips_toIR.c
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===================================================================
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--- valgrind/VEX/priv/guest_mips_toIR.c (revision 3206)
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+++ valgrind/VEX/priv/guest_mips_toIR.c (working copy)
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@@ -16794,6 +16794,7 @@
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mkU64(0x0) : mkU32(0x0)))), imm);
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break;
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+#if defined(__mips__) && ((defined(__mips_isa_rev) && __mips_isa_rev < 6))
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case 0x08: { /* ADDI */
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DIP("addi r%u, r%u, %u", rt, rs, imm);
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IRTemp tmpRs32 = newTemp(Ity_I32);
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@@ -16831,6 +16832,8 @@
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putIReg(rt, mkWidenFrom32(ty, mkexpr(t0), True));
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break;
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}
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+#endif
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+
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case 0x09: /* ADDIU */
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DIP("addiu r%u, r%u, %u", rt, rs, imm);
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if (mode64) {
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@@ -16888,7 +16891,8 @@
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mkU32(extend_s_16to32(imm)))));
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break;
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- case 0x18: { /* Doubleword Add Immidiate - DADD; MIPS64 */
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+#if defined(__mips__) && ((defined(__mips_isa_rev) && __mips_isa_rev < 6))
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+ case 0x18: { /* Doubleword Add Immidiate - DADDI; MIPS64 */
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DIP("daddi r%u, r%u, %u", rt, rs, imm);
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IRTemp tmpRs64 = newTemp(Ity_I64);
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assign(tmpRs64, getIReg(rs));
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@@ -16926,6 +16930,7 @@
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putIReg(rt, mkexpr(t0));
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break;
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}
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+#endif
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case 0x19: /* Doubleword Add Immidiate Unsigned - DADDIU; MIPS64 */
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DIP("daddiu r%u, r%u, %u", rt, rs, imm);
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@@ -1,2 +1,2 @@
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# From http://valgrind.org/downloads/current.html
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md5 4ea62074da73ae82e0162d6550d3f129 valgrind-3.11.0.tar.bz2
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md5 6eb03c0c10ea917013a7622e483d61bb valgrind-3.12.0.tar.bz2
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@@ -4,22 +4,25 @@
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#
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################################################################################
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VALGRIND_VERSION = 3.11.0
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VALGRIND_VERSION = 3.12.0
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VALGRIND_SITE = http://valgrind.org/downloads
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VALGRIND_SOURCE = valgrind-$(VALGRIND_VERSION).tar.bz2
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VALGRIND_LICENSE = GPLv2 GFDLv1.2
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VALGRIND_LICENSE = GPLv2, GFDLv1.2
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VALGRIND_LICENSE_FILES = COPYING COPYING.DOCS
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VALGRIND_CONF_OPTS = --disable-ubsan
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VALGRIND_CONF_OPTS = \
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--disable-ubsan \
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--without-mpicc
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VALGRIND_INSTALL_STAGING = YES
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# patch 0004-Fixes-for-musl-libc.patch touching configure.ac
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VALGRIND_AUTORECONF = YES
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ifeq ($(BR2_GCC_ENABLE_TLS),y)
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VALGRIND_CONF_OPTS += --enable-tls
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else
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VALGRIND_CONF_OPTS += --disable-tls
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endif
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# Valgrind must be compiled with no stack protection, so forcefully
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# pass -fno-stack-protector to override what Buildroot may have in
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# TARGET_CFLAGS if BR2_SSP_* support is enabled.
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VALGRIND_CFLAGS = \
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$(TARGET_CFLAGS) \
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-fno-stack-protector
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# When Valgrind detects a 32-bit MIPS architecture, it forcibly adds
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# -march=mips32 to CFLAGS; when it detects a 64-bit MIPS architecture,
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@@ -31,9 +34,11 @@ endif
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# and pass the right -march option, so they take precedence over
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# Valgrind's wrongfully detected value.
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ifeq ($(BR2_mips)$(BR2_mipsel)$(BR2_mips64)$(BR2_mips64el),y)
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VALGRIND_CONF_ENV += CFLAGS="$(TARGET_CFLAGS) -march=$(BR2_GCC_TARGET_ARCH)"
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VALGRIND_CFLAGS += -march=$(BR2_GCC_TARGET_ARCH)
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endif
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VALGRIND_CONF_ENV = CFLAGS="$(VALGRIND_CFLAGS)"
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# On ARM, Valgrind only supports ARMv7, and uses the arch part of the
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# host tuple to determine whether it's being built for ARMv7 or
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# not. Therefore, we adjust the host tuple to specify we're on
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