Bump buildroot to 2019.02
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@@ -6,12 +6,21 @@ config BR2_ARM_CPU_HAS_NEON
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config BR2_ARM_CPU_MAYBE_HAS_NEON
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bool
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# For some cores, the FPU is optional
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config BR2_ARM_CPU_MAYBE_HAS_FPU
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bool
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config BR2_ARM_CPU_HAS_FPU
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bool
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# for some cores, VFPv2 is optional
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config BR2_ARM_CPU_MAYBE_HAS_VFPV2
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bool
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select BR2_ARM_CPU_MAYBE_HAS_FPU
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config BR2_ARM_CPU_HAS_VFPV2
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bool
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select BR2_ARM_CPU_HAS_FPU
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# for some cores, VFPv3 is optional
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config BR2_ARM_CPU_MAYBE_HAS_VFPV3
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@@ -31,6 +40,24 @@ config BR2_ARM_CPU_HAS_VFPV4
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bool
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select BR2_ARM_CPU_HAS_VFPV3
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# FPv4 is always optional
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config BR2_ARM_CPU_MAYBE_HAS_FPV4
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bool
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select BR2_ARM_CPU_MAYBE_HAS_FPU
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config BR2_ARM_CPU_HAS_FPV4
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bool
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select BR2_ARM_CPU_HAS_FPU
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# FPv5 is always optional
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config BR2_ARM_CPU_MAYBE_HAS_FPV5
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bool
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select BR2_ARM_CPU_MAYBE_HAS_FPV4
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config BR2_ARM_CPU_HAS_FPV5
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bool
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select BR2_ARM_CPU_HAS_FPV4
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config BR2_ARM_CPU_HAS_FP_ARMV8
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bool
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select BR2_ARM_CPU_HAS_VFPV4
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@@ -240,7 +267,14 @@ config BR2_cortex_m3
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config BR2_cortex_m4
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bool "cortex-M4"
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select BR2_ARM_CPU_HAS_THUMB2
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select BR2_ARM_CPU_MAYBE_HAS_FPV4
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select BR2_ARM_CPU_ARMV7M
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config BR2_cortex_m7
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bool "cortex-M7"
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select BR2_ARM_CPU_HAS_THUMB2
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select BR2_ARM_CPU_MAYBE_HAS_FPV5
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select BR2_ARM_CPU_ARMV7M
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
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endif # !BR2_ARCH_IS_64
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comment "armv8 cores"
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@@ -342,25 +376,19 @@ config BR2_exynos_m1
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select BR2_ARM_CPU_ARMV8A
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select BR2_ARCH_HAS_MMU_OPTIONAL
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
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if BR2_ARCH_IS_64
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config BR2_falkor
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bool "falkor"
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select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_FP_ARMV8
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select BR2_ARM_CPU_ARMV8A
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select BR2_ARCH_HAS_MMU_OPTIONAL
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
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config BR2_qdf24xx
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bool "qdf24xx"
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select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_FP_ARMV8
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select BR2_ARM_CPU_ARMV8A
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select BR2_ARCH_HAS_MMU_OPTIONAL
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
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if BR2_ARCH_IS_64
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config BR2_thunderx
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bool "thunderx"
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select BR2_ARM_CPU_HAS_FP_ARMV8
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@@ -406,32 +434,55 @@ if BR2_ARCH_IS_64
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comment "armv8.1a cores"
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config BR2_thunderx2t99
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bool "thunderx2t99"
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select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_FP_ARMV8
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select BR2_ARM_CPU_ARMV8A
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select BR2_ARCH_HAS_MMU_OPTIONAL
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
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config BR2_thunderx2t99p1
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bool "thunderx2t99p1"
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select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_FP_ARMV8
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select BR2_ARM_CPU_ARMV8A
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select BR2_ARCH_HAS_MMU_OPTIONAL
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
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config BR2_vulcan
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bool "vulcan"
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select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
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select BR2_ARM_CPU_HAS_FP_ARMV8
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select BR2_ARM_CPU_ARMV8A
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select BR2_ARCH_HAS_MMU_OPTIONAL
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
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endif # BR2_ARCH_IS_64
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if BR2_ARCH_IS_64
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comment "armv8.2a cores"
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config BR2_cortex_a55
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bool "cortex-A55"
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select BR2_ARM_CPU_HAS_FP_ARMV8
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select BR2_ARM_CPU_ARMV8A
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select BR2_ARCH_HAS_MMU_OPTIONAL
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
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config BR2_cortex_a75
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bool "cortex-A75"
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select BR2_ARM_CPU_HAS_FP_ARMV8
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select BR2_ARM_CPU_ARMV8A
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select BR2_ARCH_HAS_MMU_OPTIONAL
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
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config BR2_cortex_a75_a55
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bool "cortex-A75/A55 big.LITTLE"
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select BR2_ARM_CPU_HAS_FP_ARMV8
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select BR2_ARM_CPU_ARMV8A
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select BR2_ARCH_HAS_MMU_OPTIONAL
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
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endif # BR2_ARCH_IS_64
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if BR2_ARCH_IS_64
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comment "armv8.3a cores"
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config BR2_saphira
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bool "saphira"
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select BR2_ARM_CPU_HAS_FP_ARMV8
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select BR2_ARM_CPU_ARMV8A
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select BR2_ARCH_HAS_MMU_OPTIONAL
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
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endif # BR2_ARCH_IS_64
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endchoice
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config BR2_ARM_ENABLE_NEON
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@@ -445,7 +496,9 @@ config BR2_ARM_ENABLE_NEON
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config BR2_ARM_ENABLE_VFP
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bool "Enable VFP extension support"
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depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2
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depends on BR2_ARM_CPU_MAYBE_HAS_FPU
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select BR2_ARM_CPU_HAS_FPV5 if BR2_ARM_CPU_MAYBE_HAS_FPV5
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select BR2_ARM_CPU_HAS_FPV4 if BR2_ARM_CPU_MAYBE_HAS_FPV4
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select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
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select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
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select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
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@@ -456,9 +509,9 @@ config BR2_ARM_ENABLE_VFP
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choice
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prompt "Target ABI"
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depends on BR2_arm || BR2_armeb
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default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
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default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_FPU
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default BR2_ARM_EABI
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depends on BR2_arm || BR2_armeb
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help
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Application Binary Interface to use. The Application Binary
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Interface describes the calling conventions (how arguments
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@@ -491,7 +544,7 @@ config BR2_ARM_EABI
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config BR2_ARM_EABIHF
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bool "EABIhf"
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depends on BR2_ARM_CPU_HAS_VFPV2
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depends on BR2_ARM_CPU_HAS_FPU
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help
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The EABIhf is an extension of EABI which supports the 'hard'
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floating point model. This model uses the floating point
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@@ -512,10 +565,12 @@ endchoice
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choice
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prompt "Floating point strategy"
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default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
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default BR2_ARM_FPU_FPV5D16 if BR2_ARM_CPU_HAS_FPV5
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default BR2_ARM_FPU_FPV4D16 if BR2_ARM_CPU_HAS_FPV4
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default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
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default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
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default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
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default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
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default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_FPU
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config BR2_ARM_SOFT_FLOAT
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bool "Soft float"
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@@ -622,6 +677,38 @@ config BR2_ARM_FPU_NEON_VFPV4
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example on Cortex-A5 and Cortex-A7, support for VFPv4 and
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NEON is optional.
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config BR2_ARM_FPU_FPV4D16
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bool "FPv4-D16"
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depends on BR2_ARM_CPU_HAS_FPV4
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help
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This option allows to use the FPv4-SP (single precision)
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floating point unit, as available in some ARMv7m processors
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(Cortex-M4).
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config BR2_ARM_FPU_FPV5D16
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bool "FPv5-D16"
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depends on BR2_ARM_CPU_HAS_FPV5
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
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help
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This option allows to use the FPv5-SP (single precision)
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floating point unit, as available in some ARMv7m processors
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(Cortex-M7).
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Note that if you want binary code that works on the earlier
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Cortex-M4, you should instead select FPv4-D16.
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config BR2_ARM_FPU_FPV5DPD16
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bool "FPv5-DP-D16"
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depends on BR2_ARM_CPU_HAS_FPV5
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select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
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help
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This option allows to use the FPv5-DP (double precision)
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floating point unit, as available in some ARMv7m processors
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(Cortex-M7).
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Note that if you want binary code that works on the earlier
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Cortex-M4, you should instead select FPv4-D16.
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config BR2_ARM_FPU_FP_ARMV8
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bool "FP-ARMv8"
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depends on BR2_ARM_CPU_HAS_FP_ARMV8
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@@ -716,6 +803,7 @@ config BR2_GCC_TARGET_CPU
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# armv7m
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default "cortex-m3" if BR2_cortex_m3
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default "cortex-m4" if BR2_cortex_m4
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default "cortex-m7" if BR2_cortex_m7
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# armv8a
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default "cortex-a32" if BR2_cortex_a32
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default "cortex-a35" if BR2_cortex_a35
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@@ -740,13 +828,18 @@ config BR2_GCC_TARGET_CPU
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default "thunderx2t99" if BR2_thunderx2t99
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default "thunderx2t99p1" if BR2_thunderx2t99p1
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default "vulcan" if BR2_vulcan
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# armv8.2a
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default "cortex-a55" if BR2_cortex_a55
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default "cortex-a75" if BR2_cortex_a75
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default "cortex-a75.cortex-a55" if BR2_cortex_a75_a55
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# armv8.3a
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default "saphira" if BR2_saphira
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config BR2_GCC_TARGET_ABI
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default "aapcs-linux" if BR2_arm || BR2_armeb
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default "lp64" if BR2_aarch64 || BR2_aarch64_be
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config BR2_GCC_TARGET_FPU
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depends on BR2_arm || BR2_armeb
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default "vfp" if BR2_ARM_FPU_VFPV2
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default "vfpv3" if BR2_ARM_FPU_VFPV3
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default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
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@@ -754,8 +847,12 @@ config BR2_GCC_TARGET_FPU
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default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
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default "neon" if BR2_ARM_FPU_NEON
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default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
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default "fpv4-sp-d16" if BR2_ARM_FPU_FPV4D16
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default "fpv5-sp-d16" if BR2_ARM_FPU_FPV5D16
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default "fpv5-d16" if BR2_ARM_FPU_FPV5DPD16
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default "fp-armv8" if BR2_ARM_FPU_FP_ARMV8
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default "neon-fp-armv8" if BR2_ARM_FPU_NEON_FP_ARMV8
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depends on BR2_arm || BR2_armeb
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config BR2_GCC_TARGET_FLOAT_ABI
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default "soft" if BR2_ARM_SOFT_FLOAT
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