update buildroot to 2017.02.11

This commit is contained in:
jbnadal
2018-05-22 15:35:47 +02:00
parent 4bf1f5e091
commit a3c10bd762
9257 changed files with 433426 additions and 1701 deletions

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@@ -0,0 +1,249 @@
Patch borrowed from OpenEmbedded, available at
/meta/recipes-extended/libaio/libaio/00_arches.patch in their source
tree. This patch has been modified to only add the MIPS definitions.
The patch adds MIPS specific definitions (syscall number and macros).
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Index: libaio-0.3.110/src/syscall.h
===================================================================
--- libaio-0.3.110.orig/src/syscall.h
+++ libaio-0.3.110/src/syscall.h
@@ -28,6 +28,8 @@
#include "syscall-sparc.h"
#elif defined(__aarch64__)
#include "syscall-arm64.h"
+#elif defined(__mips__)
+#include "syscall-mips.h"
#else
#warning "using generic syscall method"
#include "syscall-generic.h"
Index: libaio-0.3.110/src/syscall-mips.h
===================================================================
--- /dev/null
+++ libaio-0.3.110/src/syscall-mips.h
@@ -0,0 +1,223 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ *
+ * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto
+ * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A
+ */
+
+#ifndef _MIPS_SIM_ABI32
+#define _MIPS_SIM_ABI32 1
+#define _MIPS_SIM_NABI32 2
+#define _MIPS_SIM_ABI64 3
+#endif
+
+#if _MIPS_SIM == _MIPS_SIM_ABI32
+
+/*
+ * Linux o32 style syscalls are in the range from 4000 to 4999.
+ */
+#define __NR_Linux 4000
+#define __NR_io_setup (__NR_Linux + 241)
+#define __NR_io_destroy (__NR_Linux + 242)
+#define __NR_io_getevents (__NR_Linux + 243)
+#define __NR_io_submit (__NR_Linux + 244)
+#define __NR_io_cancel (__NR_Linux + 245)
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+
+#if _MIPS_SIM == _MIPS_SIM_ABI64
+
+/*
+ * Linux 64-bit syscalls are in the range from 5000 to 5999.
+ */
+#define __NR_Linux 5000
+#define __NR_io_setup (__NR_Linux + 200)
+#define __NR_io_destroy (__NR_Linux + 201)
+#define __NR_io_getevents (__NR_Linux + 202)
+#define __NR_io_submit (__NR_Linux + 203)
+#define __NR_io_cancel (__NR_Linux + 204)
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
+
+#if _MIPS_SIM == _MIPS_SIM_NABI32
+
+/*
+ * Linux N32 syscalls are in the range from 6000 to 6999.
+ */
+#define __NR_Linux 6000
+#define __NR_io_setup (__NR_Linux + 200)
+#define __NR_io_destroy (__NR_Linux + 201)
+#define __NR_io_getevents (__NR_Linux + 202)
+#define __NR_io_submit (__NR_Linux + 203)
+#define __NR_io_cancel (__NR_Linux + 204)
+#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
+
+#define io_syscall1(type,fname,sname,atype,a) \
+type fname(atype a) \
+{ \
+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
+ register unsigned long __a3 asm("$7"); \
+ unsigned long __v0; \
+ \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
+ "li\t$2, %3\t\t\t# " #fname "\n\t" \
+ "syscall\n\t" \
+ "move\t%0, $2\n\t" \
+ ".set\treorder" \
+ : "=&r" (__v0), "=r" (__a3) \
+ : "r" (__a0), "i" (__NR_##sname) \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
+ \
+ if (__a3 == 0) \
+ return (type) __v0; \
+ return (type) -1; \
+}
+
+#define io_syscall2(type,fname,sname,atype,a,btype,b) \
+type fname(atype a, btype b) \
+{ \
+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
+ register unsigned long __a3 asm("$7"); \
+ unsigned long __v0; \
+ \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
+ "li\t$2, %4\t\t\t# " #fname "\n\t" \
+ "syscall\n\t" \
+ "move\t%0, $2\n\t" \
+ ".set\treorder" \
+ : "=&r" (__v0), "=r" (__a3) \
+ : "r" (__a0), "r" (__a1), "i" (__NR_##sname) \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
+ \
+ if (__a3 == 0) \
+ return (type) __v0; \
+ return (type) -1; \
+}
+
+#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
+type fname(atype a, btype b, ctype c) \
+{ \
+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
+ register unsigned long __a2 asm("$6") = (unsigned long) c; \
+ register unsigned long __a3 asm("$7"); \
+ unsigned long __v0; \
+ \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
+ "li\t$2, %5\t\t\t# " #fname "\n\t" \
+ "syscall\n\t" \
+ "move\t%0, $2\n\t" \
+ ".set\treorder" \
+ : "=&r" (__v0), "=r" (__a3) \
+ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
+ \
+ if (__a3 == 0) \
+ return (type) __v0; \
+ return (type) -1; \
+}
+
+#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
+type fname(atype a, btype b, ctype c, dtype d) \
+{ \
+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
+ register unsigned long __a2 asm("$6") = (unsigned long) c; \
+ register unsigned long __a3 asm("$7") = (unsigned long) d; \
+ unsigned long __v0; \
+ \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
+ "li\t$2, %5\t\t\t# " #fname "\n\t" \
+ "syscall\n\t" \
+ "move\t%0, $2\n\t" \
+ ".set\treorder" \
+ : "=&r" (__v0), "+r" (__a3) \
+ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
+ \
+ if (__a3 == 0) \
+ return (type) __v0; \
+ return (type) -1; \
+}
+
+#if (_MIPS_SIM == _MIPS_SIM_ABI32)
+
+/*
+ * Using those means your brain needs more than an oil change ;-)
+ */
+
+#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
+type fname(atype a, btype b, ctype c, dtype d, etype e) \
+{ \
+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
+ register unsigned long __a2 asm("$6") = (unsigned long) c; \
+ register unsigned long __a3 asm("$7") = (unsigned long) d; \
+ unsigned long __v0; \
+ \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
+ "lw\t$2, %6\n\t" \
+ "subu\t$29, 32\n\t" \
+ "sw\t$2, 16($29)\n\t" \
+ "li\t$2, %5\t\t\t# " #fname "\n\t" \
+ "syscall\n\t" \
+ "move\t%0, $2\n\t" \
+ "addiu\t$29, 32\n\t" \
+ ".set\treorder" \
+ : "=&r" (__v0), "+r" (__a3) \
+ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname), \
+ "m" ((unsigned long)e) \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
+ \
+ if (__a3 == 0) \
+ return (type) __v0; \
+ return (type) -1; \
+}
+
+#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
+
+#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
+
+#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
+type fname (atype a,btype b,ctype c,dtype d,etype e) \
+{ \
+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
+ register unsigned long __a2 asm("$6") = (unsigned long) c; \
+ register unsigned long __a3 asm("$7") = (unsigned long) d; \
+ register unsigned long __a4 asm("$8") = (unsigned long) e; \
+ unsigned long __v0; \
+ \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
+ "li\t$2, %6\t\t\t# " #fname "\n\t" \
+ "syscall\n\t" \
+ "move\t%0, $2\n\t" \
+ ".set\treorder" \
+ : "=&r" (__v0), "+r" (__a3) \
+ : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##sname) \
+ : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
+ \
+ if (__a3 == 0) \
+ return (type) __v0; \
+ return (type) -1; \
+}
+
+#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
+

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@@ -0,0 +1,56 @@
From 14dee5707716629b1bc8d06b93cdfe9ea1a3b813 Mon Sep 17 00:00:00 2001
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Date: Mon, 29 Aug 2016 22:14:26 +0200
Subject: [PATCH] src/Makefile: add ENABLE_SHARED boolean to allow static-only
build
Currently, the libaio builds sytem builds a shared library
unconditionally. In some environments, this is not possible or
desirable. This commit adds a new Makefile variable, ENABLE_SHARED,
which defaults to "1" (i.e shared library enabled) and that allows to
override this behavior, and therefore to disable the build and
installation of the shared library.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
src/Makefile | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/Makefile b/src/Makefile
index eadb336..cfab240 100644
--- a/src/Makefile
+++ b/src/Makefile
@@ -8,12 +8,17 @@ SO_CFLAGS=-shared $(CFLAGS)
L_CFLAGS=$(CFLAGS)
LINK_FLAGS=
LINK_FLAGS+=$(LDFLAGS)
+ENABLE_SHARED ?= 1
soname=libaio.so.1
minor=0
micro=1
libname=$(soname).$(minor).$(micro)
-all_targets += libaio.a $(libname)
+all_targets += libaio.a
+
+ifeq ($(ENABLE_SHARED),1)
+all_targets += $(libname)
+endif
all: $(all_targets)
@@ -55,9 +60,11 @@ $(libname): $(libaio_sobjs) libaio.map
install: $(all_targets)
install -D -m 644 libaio.h $(includedir)/libaio.h
install -D -m 644 libaio.a $(libdir)/libaio.a
+ifeq ($(ENABLE_SHARED),1)
install -D -m 755 $(libname) $(libdir)/$(libname)
ln -sf $(libname) $(libdir)/$(soname)
ln -sf $(libname) $(libdir)/libaio.so
+endif
$(libaio_objs): libaio.h
--
2.7.4

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@@ -0,0 +1,24 @@
Patch borrowed from OpenEmbedded, available at
recipes/libaio/libaio-0.3.106/destdir.patch in their source tree.
It just adds support for the traditional DESTDIR variable to install
the library in a different sysroot than the normal /.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: libaio-0.3.109/Makefile
===================================================================
--- libaio-0.3.109.orig/Makefile
+++ libaio-0.3.109/Makefile
@@ -23,7 +23,7 @@
@$(MAKE) -C src
install:
- @$(MAKE) -C src install prefix=$(prefix) includedir=$(includedir) libdir=$(libdir)
+ @$(MAKE) -C src install prefix=$(DESTDIR)$(prefix) includedir=$(DESTDIR)$(includedir) libdir=$(DESTDIR)$(libdir)
check:
@$(MAKE) -C harness check

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@@ -0,0 +1,11 @@
config BR2_PACKAGE_LIBAIO_ARCH_SUPPORTS
bool
default y if BR2_aarch64 || BR2_arm || BR2_armeb || BR2_i386 || \
BR2_m68k || BR2_mips || BR2_mipsel || BR2_powerpc || \
BR2_sparc || BR2_x86_64
config BR2_PACKAGE_LIBAIO
bool "libaio"
depends on BR2_PACKAGE_LIBAIO_ARCH_SUPPORTS
help
Library for doing asynchronous I/O

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@@ -0,0 +1,2 @@
# From http://snapshot.debian.org/archive/debian/20141023T043132Z/pool/main/liba/libaio/libaio_0.3.110-1.dsc
sha256 e019028e631725729376250e32b473012f7cb68e1f7275bfc1bbcdd0f8745f7e libaio_0.3.110.orig.tar.gz

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@@ -0,0 +1,38 @@
################################################################################
#
# libaio
#
################################################################################
LIBAIO_VERSION = 0.3.110
LIBAIO_SOURCE = libaio_$(LIBAIO_VERSION).orig.tar.gz
LIBAIO_SITE = http://snapshot.debian.org/archive/debian/20141023T043132Z/pool/main/liba/libaio
LIBAIO_INSTALL_STAGING = YES
LIBAIO_LICENSE = LGPLv2.1+
LIBAIO_LICENSE_FILES = COPYING
LIBAIO_CONFIGURE_OPTS = $(TARGET_CONFIGURE_OPTS)
ifeq ($(BR2_STATIC_LIBS),y)
LIBAIO_CONFIGURE_OPTS += ENABLE_SHARED=0
endif
# On PowerPC, a weird toolchain issue causes -Os builds to produce
# references to hidden symbols, so we're forcing -O2
ifeq ($(BR2_powerpc),y)
LIBAIO_CONFIGURE_OPTS += CFLAGS="$(subst -Os,-O2,$(TARGET_CFLAGS))"
endif
define LIBAIO_BUILD_CMDS
$(LIBAIO_CONFIGURE_OPTS) $(TARGET_MAKE_ENV) $(MAKE) -C $(@D)
endef
define LIBAIO_INSTALL_STAGING_CMDS
$(LIBAIO_CONFIGURE_OPTS) $(TARGET_MAKE_ENV) $(MAKE) -C $(@D) DESTDIR=$(STAGING_DIR) install
endef
define LIBAIO_INSTALL_TARGET_CMDS
$(LIBAIO_CONFIGURE_OPTS) $(TARGET_MAKE_ENV) $(MAKE) -C $(@D) DESTDIR=$(TARGET_DIR) install
endef
$(eval $(generic-package))