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Bump buidlroot version to 2018.02.6

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This commit is contained in:
jbnadal
2018-10-22 14:55:59 +02:00
parent 222960cedb
commit bec94fdb63
6150 changed files with 84803 additions and 117446 deletions
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40
bsp/buildroot/package/gcc/7.3.0/0002-fix-building-on-ppc64.patch Normal file
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@@ -0,0 +1,40 @@
From aa65a43516da1d48011ef621ed5988289711d99b Mon Sep 17 00:00:00 2001
From: marxin <marxin@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Fri, 29 Jun 2018 09:31:30 +0000
Subject: [PATCH] Partial backport r256656
2018-06-29 Martin Liska <mliska@suse.cz>
Backport from mainline
2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
* lex.c (search_line_fast): Remove illegal coercion of an
unaligned pointer value to vector pointer type and replace with
use of __builtin_vec_vsx_ld () built-in function, which operates
on unaligned pointer values.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-6-branch@261621 138bc75d-0d04-0410-961f-82ee72b054a4
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-7-branch@262243 138bc75d-0d04-0410-961f-82ee72b054a4
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
libcpp/lex.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libcpp/lex.c b/libcpp/lex.c
index 097c78002cbb..e0fb9e822c44 100644
--- a/libcpp/lex.c
+++ b/libcpp/lex.c
@@ -568,7 +568,7 @@ search_line_fast (const uchar *s, const uchar *end ATTRIBUTE_UNUSED)
{
vc m_nl, m_cr, m_bs, m_qm;
- data = *((const vc *)s);
+ data = __builtin_vec_vsx_ld (0, s);
s += 16;
m_nl = (vc) __builtin_vec_cmpeq(data, repl_nl);
--
2.17.1

101
bsp/buildroot/package/gcc/7.3.0/0002-xtensa-fix-PR-target-65416.patch Normal file
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@@ -0,0 +1,101 @@
From 87fda0741d210727672cba5e54a37a189e8ac04e Mon Sep 17 00:00:00 2001
From: Max Filippov <jcmvbkbc@gmail.com>
Date: Sun, 17 Jun 2018 21:18:39 -0700
Subject: [PATCH] xtensa: fix PR target/65416
The issue is caused by reordering of stack pointer update after stack
space allocation with instructions that write to the allocated stack
space. In windowed ABI register spill area for the previous call frame
is located just below the stack pointer and may be reloaded back into
the register file on movsp.
Implement allocate_stack pattern for windowed ABI configuration and
insert an instruction that prevents reordering of frame memory access
and stack pointer update.
gcc/
2018-06-19 Max Filippov <jcmvbkbc@gmail.com>
* config/xtensa/xtensa.md (UNSPEC_FRAME_BLOCKAGE): New unspec
constant.
(allocate_stack, frame_blockage, *frame_blockage): New patterns.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Backported from: r261755
---
gcc/config/xtensa/xtensa.md | 46 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 84967dbedc08..209f839cfb0f 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -38,6 +38,7 @@
(UNSPEC_MEMW 11)
(UNSPEC_LSETUP_START 12)
(UNSPEC_LSETUP_END 13)
+ (UNSPEC_FRAME_BLOCKAGE 14)
(UNSPECV_SET_FP 1)
(UNSPECV_ENTRY 2)
@@ -1676,6 +1677,32 @@
;; Miscellaneous instructions.
+;; In windowed ABI stack pointer adjustment must happen before any access
+;; to the space allocated on stack is allowed, otherwise register spill
+;; area may be clobbered. That's what frame blockage is supposed to enforce.
+
+(define_expand "allocate_stack"
+ [(set (match_operand 0 "nonimmed_operand")
+ (minus (reg A1_REG) (match_operand 1 "add_operand")))
+ (set (reg A1_REG)
+ (minus (reg A1_REG) (match_dup 1)))]
+ "TARGET_WINDOWED_ABI"
+{
+ if (CONST_INT_P (operands[1]))
+ {
+ rtx neg_op0 = GEN_INT (-INTVAL (operands[1]));
+ emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
+ }
+ else
+ {
+ emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx,
+ operands[1]));
+ }
+ emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
+ emit_insn (gen_frame_blockage ());
+ DONE;
+})
+
(define_expand "prologue"
[(const_int 0)]
""
@@ -1767,6 +1794,25 @@
[(set_attr "length" "0")
(set_attr "type" "nop")])
+;; Do not schedule instructions accessing memory before this point.
+
+(define_expand "frame_blockage"
+ [(set (match_dup 0)
+ (unspec:BLK [(match_dup 1)] UNSPEC_FRAME_BLOCKAGE))]
+ ""
+{
+ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
+ MEM_VOLATILE_P (operands[0]) = 1;
+ operands[1] = stack_pointer_rtx;
+})
+
+(define_insn "*frame_blockage"
+ [(set (match_operand:BLK 0 "" "")
+ (unspec:BLK [(match_operand:SI 1 "" "")] UNSPEC_FRAME_BLOCKAGE))]
+ ""
+ ""
+ [(set_attr "length" "0")])
+
(define_insn "trap"
[(trap_if (const_int 1) (const_int 0))]
""
--
2.11.0

39
bsp/buildroot/package/gcc/7.3.0/0003-gcc-xtensa-fix-NAND-code-in-xtensa_expand_atomic.patch Normal file
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@@ -0,0 +1,39 @@
From 6765eecde2ed8d4be0fc217408b9e9b92a840aff Mon Sep 17 00:00:00 2001
From: Max Filippov <jcmvbkbc@gmail.com>
Date: Tue, 4 Sep 2018 00:39:32 -0700
Subject: [PATCH] gcc: xtensa: fix NAND code in xtensa_expand_atomic
NAND is ~(a1 & a2), but xtensa_expand_atomic does ~a1 & a2.
That fixes libatomic tests atomic-op-{1,2}.
gcc/
2018-09-04 Max Filippov <jcmvbkbc@gmail.com>
* config/xtensa/xtensa.c (xtensa_expand_atomic): Reorder AND and
XOR operations in NAND case.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Backported from: r264087
---
gcc/config/xtensa/xtensa.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 7cfe64d42895..080bb4ad765d 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -1614,9 +1614,9 @@ xtensa_expand_atomic (enum rtx_code code, rtx target, rtx mem, rtx val,
break;
case MULT: /* NAND */
- tmp = expand_simple_binop (SImode, XOR, old, ac.modemask,
+ tmp = expand_simple_binop (SImode, AND, old, val,
NULL_RTX, 1, OPTAB_DIRECT);
- tmp = expand_simple_binop (SImode, AND, tmp, val,
+ tmp = expand_simple_binop (SImode, XOR, tmp, ac.modemask,
new_rtx, 1, OPTAB_DIRECT);
break;
--
2.11.0

29
bsp/buildroot/package/gcc/7.3.0/0100-uclibc-conf.patch Normal file
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@@ -0,0 +1,29 @@
From 326b880b20e5f8187dbda736b4c4c662cbfb00ca Mon Sep 17 00:00:00 2001
From: Romain Naour <romain.naour@gmail.com>
Date: Tue, 2 May 2017 22:36:15 +0200
Subject: [PATCH] uclibc-conf
[Romain: convert to git patch]
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
contrib/regression/objs-gcc.sh | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/contrib/regression/objs-gcc.sh b/contrib/regression/objs-gcc.sh
index 60b0497..6dc7ead 100755
--- a/contrib/regression/objs-gcc.sh
+++ b/contrib/regression/objs-gcc.sh
@@ -106,6 +106,10 @@ if [ $H_REAL_TARGET = $H_REAL_HOST -a $H_REAL_TARGET = i686-pc-linux-gnu ]
then
make all-gdb all-dejagnu all-ld || exit 1
make install-gdb install-dejagnu install-ld || exit 1
+elif [ $H_REAL_TARGET = $H_REAL_HOST -a $H_REAL_TARGET = i686-pc-linux-uclibc ]
+ then
+ make all-gdb all-dejagnu all-ld || exit 1
+ make install-gdb install-dejagnu install-ld || exit 1
elif [ $H_REAL_TARGET = $H_REAL_HOST ] ; then
make bootstrap || exit 1
make install || exit 1
--
2.9.3

45
bsp/buildroot/package/gcc/7.3.0/0810-arm-softfloat-libgcc.patch Normal file
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@@ -0,0 +1,45 @@
From 420a304ac0daa29d66da6ed5b0b49fc4c482d522 Mon Sep 17 00:00:00 2001
From: Romain Naour <romain.naour@gmail.com>
Date: Tue, 2 May 2017 22:46:18 +0200
Subject: [PATCH] arm softfloat libgcc
[Romain: convert to git patch]
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
gcc/config/arm/linux-elf.h | 2 +-
libgcc/config/arm/t-linux | 7 ++++++-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h
index 3d62367..dad0b97 100644
--- a/gcc/config/arm/linux-elf.h
+++ b/gcc/config/arm/linux-elf.h
@@ -58,7 +58,7 @@
%{shared:-lc} \
%{!shared:%{profile:-lc_p}%{!profile:-lc}}"
-#define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
+#define LIBGCC_SPEC "-lgcc"
#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
diff --git a/libgcc/config/arm/t-linux b/libgcc/config/arm/t-linux
index 3d520de..e7bc042 100644
--- a/libgcc/config/arm/t-linux
+++ b/libgcc/config/arm/t-linux
@@ -1,6 +1,11 @@
LIB1ASMSRC = arm/lib1funcs.S
LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx _clzsi2 _clzdi2 \
- _ctzsi2 _arm_addsubdf3 _arm_addsubsf3
+ _ctzsi2 _arm_addsubdf3 _arm_addsubsf3 \
+ _arm_addsubdf3 _arm_addsubsf3 \
+ _arm_negdf2 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \
+ _arm_fixdfsi _arm_fixunsdfsi _arm_truncdfsf2 \
+ _arm_negsf2 _arm_muldivsf3 _arm_cmpsf2 _arm_unordsf2 \
+ _arm_fixsfsi _arm_fixunssfsi
# Just for these, we omit the frame pointer since it makes such a big
# difference.
--
2.9.3

64
bsp/buildroot/package/gcc/7.3.0/0860-cilk-fix-build-without-wchar.patch Normal file
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@@ -0,0 +1,64 @@
From 714739e69ead1d9823233af40645277f6d4633ea Mon Sep 17 00:00:00 2001
From: Peter Korsgaard <peter@korsgaard.com>
Date: Tue, 2 May 2017 23:21:46 +0200
Subject: [PATCH] cilk: fix build without wchar
When building against uClibc with wchar support disabled, WCHAR_MIN and
WCHAR_MAX are not defined leading to compilation errors.
Fix it by only including the wchar code if available.
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
[Romain: convert to git patch]
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
libcilkrts/include/cilk/reducer_min_max.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/libcilkrts/include/cilk/reducer_min_max.h b/libcilkrts/include/cilk/reducer_min_max.h
index 641aa82..4f8e010 100644
--- a/libcilkrts/include/cilk/reducer_min_max.h
+++ b/libcilkrts/include/cilk/reducer_min_max.h
@@ -3289,7 +3289,9 @@ __CILKRTS_BEGIN_EXTERN_C
CILK_C_REDUCER_MAX_INSTANCE(char, char, CHAR_MIN)
CILK_C_REDUCER_MAX_INSTANCE(unsigned char, uchar, 0)
CILK_C_REDUCER_MAX_INSTANCE(signed char, schar, SCHAR_MIN)
+#ifdef WCHAR_MIN
CILK_C_REDUCER_MAX_INSTANCE(wchar_t, wchar_t, WCHAR_MIN)
+#endif
CILK_C_REDUCER_MAX_INSTANCE(short, short, SHRT_MIN)
CILK_C_REDUCER_MAX_INSTANCE(unsigned short, ushort, 0)
CILK_C_REDUCER_MAX_INSTANCE(int, int, INT_MIN)
@@ -3441,7 +3443,9 @@ __CILKRTS_BEGIN_EXTERN_C
CILK_C_REDUCER_MAX_INDEX_INSTANCE(char, char, CHAR_MIN)
CILK_C_REDUCER_MAX_INDEX_INSTANCE(unsigned char, uchar, 0)
CILK_C_REDUCER_MAX_INDEX_INSTANCE(signed char, schar, SCHAR_MIN)
+#ifdef WCHAR_MIN
CILK_C_REDUCER_MAX_INDEX_INSTANCE(wchar_t, wchar_t, WCHAR_MIN)
+#endif
CILK_C_REDUCER_MAX_INDEX_INSTANCE(short, short, SHRT_MIN)
CILK_C_REDUCER_MAX_INDEX_INSTANCE(unsigned short, ushort, 0)
CILK_C_REDUCER_MAX_INDEX_INSTANCE(int, int, INT_MIN)
@@ -3567,7 +3571,9 @@ __CILKRTS_BEGIN_EXTERN_C
CILK_C_REDUCER_MIN_INSTANCE(char, char, CHAR_MAX)
CILK_C_REDUCER_MIN_INSTANCE(unsigned char, uchar, CHAR_MAX)
CILK_C_REDUCER_MIN_INSTANCE(signed char, schar, SCHAR_MAX)
+#ifdef WCHAR_MAX
CILK_C_REDUCER_MIN_INSTANCE(wchar_t, wchar_t, WCHAR_MAX)
+#endif
CILK_C_REDUCER_MIN_INSTANCE(short, short, SHRT_MAX)
CILK_C_REDUCER_MIN_INSTANCE(unsigned short, ushort, USHRT_MAX)
CILK_C_REDUCER_MIN_INSTANCE(int, int, INT_MAX)
@@ -3719,7 +3725,9 @@ __CILKRTS_BEGIN_EXTERN_C
CILK_C_REDUCER_MIN_INDEX_INSTANCE(char, char, CHAR_MAX)
CILK_C_REDUCER_MIN_INDEX_INSTANCE(unsigned char, uchar, CHAR_MAX)
CILK_C_REDUCER_MIN_INDEX_INSTANCE(signed char, schar, SCHAR_MAX)
+#ifdef WCHAR_MAX
CILK_C_REDUCER_MIN_INDEX_INSTANCE(wchar_t, wchar_t, WCHAR_MAX)
+#endif
CILK_C_REDUCER_MIN_INDEX_INSTANCE(short, short, SHRT_MAX)
CILK_C_REDUCER_MIN_INDEX_INSTANCE(unsigned short, ushort, USHRT_MAX)
CILK_C_REDUCER_MIN_INDEX_INSTANCE(int, int, INT_MAX)
--
2.9.3

30
bsp/buildroot/package/gcc/7.3.0/0891-fix-m68k-uclinux.patch Normal file
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@@ -0,0 +1,30 @@
From c2773170a1b0e2728f71f2275a99fd177ba2cef4 Mon Sep 17 00:00:00 2001
From: Romain Naour <romain.naour@gmail.com>
Date: Tue, 2 May 2017 23:25:17 +0200
Subject: [PATCH] fix m68k uclinux avoids internal compiler error while
compiling linux-atomic.c See here:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53833
Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
[Romain: convert to git patch]
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
libgcc/config.host | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libgcc/config.host b/libgcc/config.host
index b279a64..04fe183 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -820,7 +820,7 @@ m68k*-*-netbsdelf*)
m68k*-*-openbsd*)
;;
m68k-*-uclinux*) # Motorola m68k/ColdFire running uClinux with uClibc
- tmake_file="$tmake_file m68k/t-floatlib m68k/t-linux"
+ tmake_file="$tmake_file m68k/t-floatlib"
md_unwind_header=m68k/linux-unwind.h
;;
m68k-*-linux*) # Motorola m68k's running GNU/Linux
--
2.9.3

40
bsp/buildroot/package/gcc/7.3.0/0892-microblaze-Revert.patch Normal file
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@@ -0,0 +1,40 @@
From 707a69dfb56a2976e2b5c010f0e5cb2ac9905a07 Mon Sep 17 00:00:00 2001
From: eager <eager@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Sat, 27 May 2017 18:29:40 +0000
Subject: [PATCH] Revert: 2016-01-21 Ajit Agarwal
<ajitkum@xilinx.com>
See https://gcc.gnu.org/ml/gcc/2017-05/msg00221.html.
* config/microblaze/microblaze.h
(FIXED_REGISTERS): Update in macro.
(CALL_USED_REGISTERS): Update in macro.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@248540 138bc75d-0d04-0410-961f-82ee72b054a4
Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
index 66e4ef5..2c9ece1 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -269,14 +269,14 @@ extern enum pipeline_type microblaze_pipe;
#define FIXED_REGISTERS \
{ \
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
- 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+ 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1, 1, 1, 1 \
}
#define CALL_USED_REGISTERS \
{ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
- 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+ 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1, 1, 1, 1 \
}
#define GP_REG_FIRST 0
--
2.1.4

111
bsp/buildroot/package/gcc/7.3.0/0900-remove-selftests.patch Normal file
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@@ -0,0 +1,111 @@
From 63f0917d90eb83d267dc517fdfb6523a74b1917c Mon Sep 17 00:00:00 2001
From: Romain Naour <romain.naour@gmail.com>
Date: Wed, 3 May 2017 00:37:06 +0200
Subject: [PATCH] remove selftests
When the gcc archive is extracted by the gcc.mk, the gcc/testsuite
is excluded:
HOST_GCC_EXCLUDES = \
libjava/* libgo/* \
gcc/testsuite/* libstdc++-v3/testsuite/*
The new Makefile target from the "Selftest framework" [1] added a dependency
on the gcc/testsuite/Makefile.
Revert partially the commit [1] to allow building gcc without selftest.
[1] https://github.com/gcc-mirror/gcc/commit/99b4f3a2d5bf2c137de9731e27b483eb6b462fd9
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
gcc/Makefile.in | 46 +++++-----------------------------------------
1 file changed, 5 insertions(+), 41 deletions(-)
diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index 74d1912..652a554 100644
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -1581,14 +1581,13 @@ OBJS = \
OBJS-libcommon = diagnostic.o diagnostic-color.o diagnostic-show-locus.o \
edit-context.o \
pretty-print.o intl.o \
- vec.o input.o version.o hash-table.o ggc-none.o memory-block.o \
- selftest.o
+ vec.o input.o version.o hash-table.o ggc-none.o memory-block.o
# Objects in libcommon-target.a, used by drivers and by the core
# compiler and containing target-dependent code.
OBJS-libcommon-target = $(common_out_object_file) prefix.o params.o \
opts.o opts-common.o options.o vec.o hooks.o common/common-targhooks.o \
- hash-table.o file-find.o spellcheck.o selftest.o
+ hash-table.o file-find.o spellcheck.o
# This lists all host objects for the front ends.
ALL_HOST_FRONTEND_OBJS = $(foreach v,$(CONFIG_LANGUAGES),$($(v)_OBJS))
@@ -1865,10 +1864,10 @@ config.status: $(srcdir)/configure $(srcdir)/config.gcc
quickstrap: all
cd $(toplevel_builddir) && $(MAKE) all-target-libgcc
-all.internal: start.encap rest.encap doc selftest
+all.internal: start.encap rest.encap doc
# This is what to compile if making a cross-compiler.
all.cross: native gcc-cross$(exeext) cpp$(exeext) specs \
- libgcc-support lang.all.cross doc selftest @GENINSRC@ srcextra
+ libgcc-support lang.all.cross doc @GENINSRC@ srcextra
# This is what must be made before installing GCC and converting libraries.
start.encap: native xgcc$(exeext) cpp$(exeext) specs \
libgcc-support lang.start.encap @GENINSRC@ srcextra
@@ -1888,41 +1887,6 @@ endif
# This does the things that can't be done on the host machine.
rest.cross: specs
-# GCC's selftests.
-# Specify a dummy input file to placate the driver.
-# Specify -nostdinc to work around missing WIND_BASE environment variable
-# required for *-wrs-vxworks-* targets.
-# Specify -o /dev/null so the output of -S is discarded. More importantly
-# It does not try to create a file with the name "null.s" on POSIX and
-# "nul.s" on Windows. Because on Windows "nul" is a reserved file name.
-# Specify the path to gcc/testsuite/selftests within the srcdir
-# as an argument to -fself-test.
-SELFTEST_FLAGS = -nostdinc -x c /dev/null -S -o /dev/null \
- -fself-test=$(srcdir)/testsuite/selftests
-
-# Run the selftests during the build once we have a driver and a cc1,
-# so that self-test failures are caught as early as possible.
-# Use "s-selftest" to ensure that we only run the selftests if the
-# driver, cc1, or selftest data change.
-.PHONY: selftest
-selftest: s-selftest
-s-selftest: $(GCC_PASSES) cc1$(exeext) stmp-int-hdrs \
- $(srcdir)/testsuite/selftests
- $(GCC_FOR_TARGET) $(SELFTEST_FLAGS)
- $(STAMP) $@
-
-# Convenience method for running selftests under gdb:
-.PHONY: selftest-gdb
-selftest-gdb: $(GCC_PASSES) cc1$(exeext) stmp-int-hdrs
- $(GCC_FOR_TARGET) $(SELFTEST_FLAGS) \
- -wrapper gdb,--args
-
-# Convenience method for running selftests under valgrind:
-.PHONY: selftest-valgrind
-selftest-valgrind: $(GCC_PASSES) cc1$(exeext) stmp-int-hdrs
- $(GCC_FOR_TARGET) $(SELFTEST_FLAGS) \
- -wrapper valgrind,--leak-check=full
-
# Recompile all the language-independent object files.
# This is used only if the user explicitly asks for it.
compilations: $(BACKEND)
@@ -2076,7 +2040,7 @@ gcc-nm.c: gcc-ar.c
cp $^ $@
COLLECT2_OBJS = collect2.o collect2-aix.o tlink.o vec.o ggc-none.o \
- collect-utils.o file-find.o hash-table.o selftest.o
+ collect-utils.o file-find.o hash-table.o
COLLECT2_LIBS = @COLLECT2_LIBS@
collect2$(exeext): $(COLLECT2_OBJS) $(LIBDEPS)
# Don't try modifying collect2 (aka ld) in place--it might be linking this.
--
2.9.3

324
bsp/buildroot/package/gcc/7.3.0/1000-arm-PR-target-81497-Fix-arm_acle.h-for-C.patch Normal file
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@@ -0,0 +1,324 @@
From 1a259ac3e39bf87e6e6a5eface8b0ebc6b2a0dfe Mon Sep 17 00:00:00 2001
From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Tue, 5 Jun 2018 09:50:16 +0000
Subject: [PATCH] [arm] PR target/81497: Fix arm_acle.h for C++
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Transfer-Encoding: 8bit
When trying to compile something with arm_acle.h using G++ we get a number of nasty errors:
arm_acle.h:48:49: error: invalid conversion from ‘const void*’ to ‘const int*’ [-fpermissive]
return __builtin_arm_ldc (__coproc, __CRd, __p);
This is because the intrinsics that are supposed to be void return the "result" of their builtin,
which is void. C lets that slide but C++ complains.
After fixing that we run into further errors:
arm_acle.h:48:46: error: invalid conversion from 'const void*' to 'const int*' [-fpermissive]
return __builtin_arm_ldc (__coproc, __CRd, __p);
^~~
Because the pointer arguments in these intrinsics are void pointers but the builtin
expects int pointers. So this patch introduces new qualifiers for void pointers and their
const-qualified versions and uses that in the specification of these intrinsics.
This gives us the opportunity of creating an arm subdirectory in g++.dg and inaugurates it
with the first arm-specific C++ tests (in that directory).
PR target/81497
* config/arm/arm-builtins.c (arm_type_qualifiers): Add
qualifier_void_pointer and qualifier_const_void_pointer.
(arm_ldc_qualifiers, arm_stc_qualifiers): Use the above.
(arm_init_builtins): Handle the above.
* config/arm/arm_acle.h (__arm_cdp, __arm_ldc, __arm_ldcl, __arm_stc,
__arm_stcl, __arm_mcr, __arm_cdp2, __arm_ldc2, __arm_ldcl2, __arm_stc2,
__arm_stcl2,__arm_mcr2, __arm_mcrr, __arm_mcrr2): Remove return for
void intrinsics.
* g++.target/arm/arm.exp: New file.
* g++.target/arm/pr81497.C: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@261191 138bc75d-0d04-0410-961f-82ee72b054a4
Upstream-Status: Merged (gcc-8-branch)
Signed-off-by: Gaël PORTAY <gael.portay@savoirfairelinux.com>
[gportay: drop gcc/{,testsuite/}ChangeLog changes]
---
gcc/config/arm/arm-builtins.c | 42 +++++++++++++---------
gcc/config/arm/arm_acle.h | 28 +++++++--------
gcc/testsuite/g++.target/arm/arm.exp | 50 ++++++++++++++++++++++++++
gcc/testsuite/g++.target/arm/pr81497.C | 9 +++++
4 files changed, 99 insertions(+), 30 deletions(-)
create mode 100644 gcc/testsuite/g++.target/arm/arm.exp
create mode 100644 gcc/testsuite/g++.target/arm/pr81497.C
diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index 7fde7a04672..183a7b907f6 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -78,7 +78,11 @@ enum arm_type_qualifiers
/* Lane indices - must be within range of previous argument = a vector. */
qualifier_lane_index = 0x200,
/* Lane indices for single lane structure loads and stores. */
- qualifier_struct_load_store_lane_index = 0x400
+ qualifier_struct_load_store_lane_index = 0x400,
+ /* A void pointer. */
+ qualifier_void_pointer = 0x800,
+ /* A const void pointer. */
+ qualifier_const_void_pointer = 0x802
};
/* The qualifier_internal allows generation of a unary builtin from
@@ -202,7 +206,7 @@ arm_cdp_qualifiers[SIMD_MAX_BUILTIN_ARGS]
static enum arm_type_qualifiers
arm_ldc_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_unsigned_immediate,
- qualifier_unsigned_immediate, qualifier_const_pointer };
+ qualifier_unsigned_immediate, qualifier_const_void_pointer };
#define LDC_QUALIFIERS \
(arm_ldc_qualifiers)
@@ -210,7 +214,7 @@ arm_ldc_qualifiers[SIMD_MAX_BUILTIN_ARGS]
static enum arm_type_qualifiers
arm_stc_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_unsigned_immediate,
- qualifier_unsigned_immediate, qualifier_pointer };
+ qualifier_unsigned_immediate, qualifier_void_pointer };
#define STC_QUALIFIERS \
(arm_stc_qualifiers)
@@ -1095,19 +1099,25 @@ arm_init_builtin (unsigned int fcode, arm_builtin_datum *d,
if (qualifiers & qualifier_pointer && VECTOR_MODE_P (op_mode))
op_mode = GET_MODE_INNER (op_mode);
- eltype = arm_simd_builtin_type
- (op_mode,
- (qualifiers & qualifier_unsigned) != 0,
- (qualifiers & qualifier_poly) != 0);
- gcc_assert (eltype != NULL);
-
- /* Add qualifiers. */
- if (qualifiers & qualifier_const)
- eltype = build_qualified_type (eltype, TYPE_QUAL_CONST);
-
- if (qualifiers & qualifier_pointer)
- eltype = build_pointer_type (eltype);
-
+ /* For void pointers we already have nodes constructed by the midend. */
+ if (qualifiers & qualifier_void_pointer)
+ eltype = qualifiers & qualifier_const
+ ? const_ptr_type_node : ptr_type_node;
+ else
+ {
+ eltype
+ = arm_simd_builtin_type (op_mode,
+ (qualifiers & qualifier_unsigned) != 0,
+ (qualifiers & qualifier_poly) != 0);
+ gcc_assert (eltype != NULL);
+
+ /* Add qualifiers. */
+ if (qualifiers & qualifier_const)
+ eltype = build_qualified_type (eltype, TYPE_QUAL_CONST);
+
+ if (qualifiers & qualifier_pointer)
+ eltype = build_pointer_type (eltype);
+ }
/* If we have reached arg_num == 0, we are at a non-void
return type. Otherwise, we are still processing
arguments. */
diff --git a/gcc/config/arm/arm_acle.h b/gcc/config/arm/arm_acle.h
index 9a2f0ba30dc..c0f6ea2d156 100644
--- a/gcc/config/arm/arm_acle.h
+++ b/gcc/config/arm/arm_acle.h
@@ -38,35 +38,35 @@ __arm_cdp (const unsigned int __coproc, const unsigned int __opc1,
const unsigned int __CRd, const unsigned int __CRn,
const unsigned int __CRm, const unsigned int __opc2)
{
- return __builtin_arm_cdp (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2);
+ __builtin_arm_cdp (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2);
}
__extension__ static __inline void __attribute__ ((__always_inline__))
__arm_ldc (const unsigned int __coproc, const unsigned int __CRd,
const void * __p)
{
- return __builtin_arm_ldc (__coproc, __CRd, __p);
+ __builtin_arm_ldc (__coproc, __CRd, __p);
}
__extension__ static __inline void __attribute__ ((__always_inline__))
__arm_ldcl (const unsigned int __coproc, const unsigned int __CRd,
const void * __p)
{
- return __builtin_arm_ldcl (__coproc, __CRd, __p);
+ __builtin_arm_ldcl (__coproc, __CRd, __p);
}
__extension__ static __inline void __attribute__ ((__always_inline__))
__arm_stc (const unsigned int __coproc, const unsigned int __CRd,
void * __p)
{
- return __builtin_arm_stc (__coproc, __CRd, __p);
+ __builtin_arm_stc (__coproc, __CRd, __p);
}
__extension__ static __inline void __attribute__ ((__always_inline__))
__arm_stcl (const unsigned int __coproc, const unsigned int __CRd,
void * __p)
{
- return __builtin_arm_stcl (__coproc, __CRd, __p);
+ __builtin_arm_stcl (__coproc, __CRd, __p);
}
__extension__ static __inline void __attribute__ ((__always_inline__))
@@ -74,7 +74,7 @@ __arm_mcr (const unsigned int __coproc, const unsigned int __opc1,
uint32_t __value, const unsigned int __CRn, const unsigned int __CRm,
const unsigned int __opc2)
{
- return __builtin_arm_mcr (__coproc, __opc1, __value, __CRn, __CRm, __opc2);
+ __builtin_arm_mcr (__coproc, __opc1, __value, __CRn, __CRm, __opc2);
}
__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
@@ -90,35 +90,35 @@ __arm_cdp2 (const unsigned int __coproc, const unsigned int __opc1,
const unsigned int __CRd, const unsigned int __CRn,
const unsigned int __CRm, const unsigned int __opc2)
{
- return __builtin_arm_cdp2 (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2);
+ __builtin_arm_cdp2 (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2);
}
__extension__ static __inline void __attribute__ ((__always_inline__))
__arm_ldc2 (const unsigned int __coproc, const unsigned int __CRd,
const void * __p)
{
- return __builtin_arm_ldc2 (__coproc, __CRd, __p);
+ __builtin_arm_ldc2 (__coproc, __CRd, __p);
}
__extension__ static __inline void __attribute__ ((__always_inline__))
__arm_ldc2l (const unsigned int __coproc, const unsigned int __CRd,
const void * __p)
{
- return __builtin_arm_ldc2l (__coproc, __CRd, __p);
+ __builtin_arm_ldc2l (__coproc, __CRd, __p);
}
__extension__ static __inline void __attribute__ ((__always_inline__))
__arm_stc2 (const unsigned int __coproc, const unsigned int __CRd,
void * __p)
{
- return __builtin_arm_stc2 (__coproc, __CRd, __p);
+ __builtin_arm_stc2 (__coproc, __CRd, __p);
}
__extension__ static __inline void __attribute__ ((__always_inline__))
__arm_stc2l (const unsigned int __coproc, const unsigned int __CRd,
void * __p)
{
- return __builtin_arm_stc2l (__coproc, __CRd, __p);
+ __builtin_arm_stc2l (__coproc, __CRd, __p);
}
__extension__ static __inline void __attribute__ ((__always_inline__))
@@ -126,7 +126,7 @@ __arm_mcr2 (const unsigned int __coproc, const unsigned int __opc1,
uint32_t __value, const unsigned int __CRn,
const unsigned int __CRm, const unsigned int __opc2)
{
- return __builtin_arm_mcr2 (__coproc, __opc1, __value, __CRn, __CRm, __opc2);
+ __builtin_arm_mcr2 (__coproc, __opc1, __value, __CRn, __CRm, __opc2);
}
__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
@@ -143,7 +143,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__))
__arm_mcrr (const unsigned int __coproc, const unsigned int __opc1,
uint64_t __value, const unsigned int __CRm)
{
- return __builtin_arm_mcrr (__coproc, __opc1, __value, __CRm);
+ __builtin_arm_mcrr (__coproc, __opc1, __value, __CRm);
}
__extension__ static __inline uint64_t __attribute__ ((__always_inline__))
@@ -159,7 +159,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__))
__arm_mcrr2 (const unsigned int __coproc, const unsigned int __opc1,
uint64_t __value, const unsigned int __CRm)
{
- return __builtin_arm_mcrr2 (__coproc, __opc1, __value, __CRm);
+ __builtin_arm_mcrr2 (__coproc, __opc1, __value, __CRm);
}
__extension__ static __inline uint64_t __attribute__ ((__always_inline__))
diff --git a/gcc/testsuite/g++.target/arm/arm.exp b/gcc/testsuite/g++.target/arm/arm.exp
new file mode 100644
index 00000000000..1a169d2f220
--- /dev/null
+++ b/gcc/testsuite/g++.target/arm/arm.exp
@@ -0,0 +1,50 @@
+# Specific regression driver for arm.
+# Copyright (C) 2009-2018 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>. */
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an arm target.
+if {![istarget arm*-*-*] } then {
+ return
+}
+
+# Load support procs.
+load_lib g++-dg.exp
+
+global DEFAULT_CXXFLAGS
+if ![info exists DEFAULT_CXXFLAGS] then {
+ set DEFAULT_CXXFLAGS " -pedantic-errors"
+}
+
+
+global dg_runtest_extra_prunes
+set dg_runtest_extra_prunes ""
+lappend dg_runtest_extra_prunes "warning: switch -m(cpu|arch)=.* conflicts with -m(cpu|arch)=.* switch"
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.C]] \
+ "" $DEFAULT_CXXFLAGS
+
+# All done.
+set dg_runtest_extra_prunes ""
+dg-finish
+
diff --git a/gcc/testsuite/g++.target/arm/pr81497.C b/gcc/testsuite/g++.target/arm/pr81497.C
new file mode 100644
index 00000000000..0519a3a3045
--- /dev/null
+++ b/gcc/testsuite/g++.target/arm/pr81497.C
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+
+#include <arm_acle.h>
+
+int main ()
+{
+ return 0;
+}
--
2.17.1