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move nes into the sources/NES directory

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jb
2009-02-05 08:24:50 +00:00
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data/testsuite/blargg_ppu_tests_2005.09.15b/palette_ram.nes Normal file
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data/testsuite/blargg_ppu_tests_2005.09.15b/power_up_palette.nes Normal file
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data/testsuite/blargg_ppu_tests_2005.09.15b/readme.txt Normal file
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NTSC NES PPU Tests
------------------
These ROMs test a few aspects of the NTSC NES PPU operation. They have been
tested on an actual NES and all give a passing result. I wrote them to verify
that my NES emulator's PPU was working properly.
Each ROM runs several tests and reports a result code on screen and by beeping
a number of times. A result code of 1 always indicates that all tests were
passed; see below for the meaning of other codes for each test.
The main source code for each test is included, and most tests are clearly
divided into sections. Some of the common support code is included, but not
all, since it runs on a custom setup. Contact me if you want to assemble the
tests yourself.
Shay Green <hotpop.com@blargg> (swap to e-mail)
palette_ram
-----------
PPU palette RAM read/write and mirroring test
1) Tests passed
2) Palette read shouldn't be buffered like other VRAM
3) Palette write/read doesn't work
4) Paletteshould be mirrored within $3f00-$3fff
5) Write to $10 should be mirrored at $00
6) Write to $00 should be mirrored at $10
power_up_palette
----------------
Reports whether initial values in palette at power-up match those
that my NES has. These values are probably unique to my NES.
1) Palette matches
2) Palette differs from table
sprite_ram
----------
Tests sprite RAM access via $2003, $2004, and $4014
1) Tests passed
2) Basic read/write doesn't work
3) Address should increment on $2004 write
4) Address should not increment on $2004 read
5) Third sprite bytes should be masked with $e3 on read
6) $4014 DMA copy doesn't work at all
7) $4014 DMA copy should start at value in $2003 and wrap
8) $4014 DMA copy should leave value in $2003 intact
vbl_clear_time
--------------
The VBL flag ($2002.7) is cleared by the PPU around 2270 CPU clocks
after NMI occurs.
1) Tests passed
2) VBL flag cleared too soon
3) VBL flag cleared too late
vram_access
-----------
Tests PPU VRAM read/write and internal read buffer operation
1) Tests passed
2) VRAM reads should be delayed in a buffer
3) Basic Write/read doesn't work
4) Read buffer shouldn't be affected by VRAM write
5) Read buffer shouldn't be affected by palette write
6) Palette read should also read VRAM into read buffer
7) "Shadow" VRAM read unaffected by palette transparent color mirroring

106
data/testsuite/blargg_ppu_tests_2005.09.15b/source/palette_ram.asm Normal file
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; PPU palette RAM read/write and mirroring test
; to do: check that upper two bits aren't stored
.include "prefix_ppu.a"
; Set VRAM address to $3f00 + X
; Preserved: A, X, Y
set_pal_addr:
pha
bit $2002
lda #$3f
sta $2006
txa
sta $2006
pla
rts
; Set palette entry X to A
; Preserved: A, X, Y
set_pal_entry:
jsr set_pal_addr
sta $2007
rts
; Read palette entry X into A
; Preserved: X, Y
get_pal_entry:
jsr set_pal_addr
lda $2007
and #$3f
rts
reset:
lda #50
jsr delay_msec
jsr wait_vbl
lda #0
sta $2000
sta $2001
lda #2;) Palette read shouldn't be buffered like other VRAM
sta result
ldx #$00
lda #$12
jsr set_pal_entry
lda #$34
sta $2007
jsr get_pal_entry
lda $2007
cmp #$12
jsr error_if_eq
lda #3;) Palette write/read doesn't work
sta result
ldx #$00
lda #$34
jsr set_pal_entry
jsr get_pal_entry
lda $2007
cmp #$34
jsr error_if_ne
lda #4;) Palette should be mirrored within $3f00-$3fff
sta result
ldx #$00
lda #$12
jsr set_pal_entry
ldx #$e0
lda #$34
jsr set_pal_entry
ldx #$00
jsr get_pal_entry
cmp #$34
jsr error_if_ne
lda #5;) Write to $10 should be mirrored at $00
sta result
ldx #$00
lda #$12
jsr set_pal_entry
ldx #$10
lda #$34
jsr set_pal_entry
ldx #$00
jsr get_pal_entry
cmp #$34
jsr error_if_ne
lda #6;) Write to $00 should be mirrored at $10
sta result
ldx #$10
lda #$12
jsr set_pal_entry
ldx #$00
lda #$34
jsr set_pal_entry
ldx #$10
jsr get_pal_entry
cmp #$34
jsr error_if_ne
lda #1;) Tests passed
sta result
jmp report_final_result

35
data/testsuite/blargg_ppu_tests_2005.09.15b/source/power_up_palette.asm Normal file
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; Reports whether initial values in palette at power-up match those
; that my NES has. These values are probably unique to my NES.
.include "prefix_ppu.a"
reset:
lda #50
jsr delay_msec
jsr wait_vbl
lda #0
sta $2000
sta $2001
lda #2;) Palette differs from table
sta result
lda #$3f
sta $2006
lda #$00
sta $2006
ldx #0
: lda $2007
cmp table,x
jsr error_if_ne
inx
cpx #$20
bne -
lda #1;) Palette matches
sta result
jmp report_final_result
table:
.db $09,$01,$00,$01,$00,$02,$02,$0D,$08,$10,$08,$24,$00,$00,$04,$2C
.db $09,$01,$34,$03,$00,$04,$00,$14,$08,$3A,$00,$02,$00,$20,$2C,$08

48
data/testsuite/blargg_ppu_tests_2005.09.15b/source/prefix_ppu.asm Normal file
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; Prefix included at the beginning of each test. Defines vectors
; and other things for custom devcart loader.
;
; Reset vector points to "reset".
; NMI points to "nmi" if defined, otherwise default_nmi.
; IRQ points to "irq" if defined, otherwise default_irq.
default_nmi:
rti
default_irq:
bit $4015
rti
; Delays for almost A milliseconds (A * 0.999009524 msec)
; Preserved: X, Y
delay_msec:
; Delays for almost 'A / 10' milliseconds (A * 0.099453968 msec)
; Preserved: X, Y
delay_01_msec:
; Variable delay. All calls include comment stating number of clocks
; used, including the setup code in the caller.
delay_yaNN:
; Report value in low-mem variable 'result' as number of beeps and
; code printed to console, then jump to forever.
report_final_result:
; Disable IRQ and NMI then loop endlessly.
forever:
; Report error if last result was non-zero
error_if_ne:
bne error_if_
rts
; Report error if last result was zero
error_if_eq:
beq error_if_
rts
; Report error
error_if_:
jmp report_final_result

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data/testsuite/blargg_ppu_tests_2005.09.15b/source/sprite_ram.asm Normal file
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; Tests sprite RAM access via $2003, $2004, and $4014
.include "prefix_ppu.a"
sprites = $200
reset:
lda #50
jsr delay_msec
jsr wait_vbl
lda #0
sta $2000
sta $2001
lda #2;) Basic read/write doesn't work
sta result
lda #0
sta $2003
lda #$12
sta $2004
lda #0
sta $2003
lda $2004
cmp #$12
jsr error_if_ne
lda #3;) Address should increment on $2004 write
sta result
lda #0
sta $2003
lda #$12
sta $2004
lda #$34
sta $2004
lda #1
sta $2003
lda $2004
cmp #$34
jsr error_if_ne
lda #4;) Address should not increment on $2004 read
sta result
lda #0
sta $2003
lda #$12
sta $2004
lda #$34
sta $2004
lda #0
sta $2003
lda $2004
lda $2004
cmp #$34
jsr error_if_eq
lda #5;) Third sprite bytes should be masked with $e3 on read
sta result
lda #3
sta $2003
lda #$ff
sta $2004
lda #3
sta $2003
lda $2004
cmp #$e3
jsr error_if_eq
lda #6;) $4014 DMA copy doesn't work at all
sta result
ldx #0 ; set up data to copy from
: lda test_data,x
sta sprites,x
inx
cpx #4
bne -
lda #0 ; dma copy
sta $2003
lda #$02
sta $4014
ldx #0 ; set up data to copy from
: stx $2003
lda $2004
cmp test_data,x
jsr error_if_ne
inx
cpx #4
bne -
lda #7;) $4014 DMA copy should start at value in $2003 and wrap
sta result
ldx #0 ; set up data to copy from
: lda test_data,x
sta sprites,x
inx
cpx #4
bne -
lda #1 ; dma copy
sta $2003
lda #$02
sta $4014
ldx #1 ; set up data to copy from
: stx $2003
lda $2004
cmp sprites - 1,x
jsr error_if_ne
inx
cpx #5
bne -
lda #8;) $4014 DMA copy should leave value in $2003 intact
sta result
lda #1 ; dma copy
sta $2003
lda #$02
sta $4014
lda #$ff
sta $2004
lda #1
sta $2003
lda $2004
cmp #$ff
jsr error_if_ne
lda #1;) Tests passed
sta result
jmp report_final_result
test_data:
.db $12,$82,$e3,$78

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data/testsuite/blargg_ppu_tests_2005.09.15b/source/vbl_clear_time.asm Normal file
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; The VBL flag ($2002.7) is cleared by the PPU around 2270 CPU clocks
; after NMI occurs.
.include "prefix_ppu.a"
phase = 10
reset:
lda #100
jsr delay_msec
lda #1
sta phase
jsr wait_vbl
lda #$80
sta $2000
lda #$00
sta $2001
wait: jmp wait
nmi: ; 7 clocks for NMI vectoring
ldy #203 ; 2251 delay
lda #1
jsr delay_ya1
dec phase ; 5
bne + ; 3
; -1
lda $2002 ; read at 2268
ldx #2;) VBL flag cleared too soon
stx result
and #$80
jsr error_if_eq
jmp wait
: bit <0
lda $2002 ; read at 2272
ldx #3;) VBL flag cleared too late
stx result
and #$80
jsr error_if_ne
lda #1;) Tests passed
sta result
jmp report_final_result

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data/testsuite/blargg_ppu_tests_2005.09.15b/source/vram_access.asm Normal file
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; Tests PPU VRAM read/write and internal read buffer operation
.include "prefix_ppu.a"
; Set VRAM addr to $2f00 + A
; Preserved: A, X, Y
set_vram_pos:
pha
lda #$2f
sta $2006
pla
sta $2006
rts
reset:
lda #50
jsr delay_msec
jsr wait_vbl
lda #0
sta $2000
sta $2001
lda #2;) VRAM reads should be delayed in a buffer
sta result
lda #$00
jsr set_vram_pos
lda #$12
sta $2007
lda #$34
sta $2007
lda #$00
jsr set_vram_pos
lda $2007
lda $2007
cmp #$34
jsr error_if_eq
lda #3;) Basic Write/read doesn't work
sta result
lda #$00
jsr set_vram_pos
lda #$56
sta $2007
lda #$00
jsr set_vram_pos
lda $2007
lda $2007
cmp #$56
jsr error_if_ne
lda #4;) Read buffer shouldn't be affected by VRAM write
sta result
lda #$00
jsr set_vram_pos
lda #$78
sta $2007
lda #$00
jsr set_vram_pos
lda #$00
lda $2007 ; buffer now contains $78
lda #$12
sta $2007 ; shouldn't affect buffer
lda $2007
cmp #$78
jsr error_if_ne
lda #5;) Read buffer shouldn't be affected by palette write
sta result
lda #$00
jsr set_vram_pos
lda #$9a
sta $2007
lda #$00
jsr set_vram_pos
lda $2007 ; buffer now contains $9a
lda #$3f
sta $2006
lda #$00
sta $2006
lda #$34
sta $2007 ; shouldn't affect buffer
lda #$01 ; change back to non-palette addr to enable buffer
jsr set_vram_pos
lda $2007
cmp #$9a
jsr error_if_ne
lda #6;) Palette read should also read VRAM into read buffer
sta result
lda #$12
jsr set_vram_pos
lda #$9a
sta $2007
lda $2007
lda #$3f
sta $2006
lda #$12
sta $2006
lda $2007 ; fills buffer with VRAM hidden by palette
lda #$13 ; change back to non-palette addr to enable buffer
jsr set_vram_pos
lda $2007
cmp #$9a
jsr error_if_ne
lda #7;) "Shadow" VRAM read unaffected by palette mirroring
sta result
lda #$04
jsr set_vram_pos
lda #$12
sta $2007
lda #$14
jsr set_vram_pos
lda #$34
sta $2007
lda #$3f
sta $2006
lda #$04
sta $2006
lda $2007 ; fills buffer with VRAM hidden by palette
lda #$13 ; change back to non-palette addr to enable buffer
jsr set_vram_pos
lda $2007
cmp #$12
jsr error_if_ne
lda #$34
sta $2007
lda #$3f
sta $2006
lda #$14
sta $2006
lda $2007 ; fills buffer with VRAM hidden by palette
lda #$13 ; change back to non-palette addr to enable buffer
jsr set_vram_pos
lda $2007
cmp #$34
jsr error_if_ne
lda #1;) Tests passed
sta result
jmp report_final_result

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data/testsuite/blargg_ppu_tests_2005.09.15b/sprite_ram.nes Normal file
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data/testsuite/blargg_ppu_tests_2005.09.15b/vbl_clear_time.nes Normal file
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data/testsuite/blargg_ppu_tests_2005.09.15b/vram_access.nes Normal file
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